Appendices
A-102
CP2E CPU Unit Software User’s Manual(W614)
z
Interrupt Response Time for Scheduled Interrupt Tasks
The interrupt response time for scheduled interrupt tasks is the time taken from after the scheduled
time specified by the MSKS instruction has elapsed until the interrupt task has actually been exe-
cuted.
The length of the interrupt response time for scheduled interrupt tasks is 0.1 ms max.
There is also an error of 10 µs in the time to the first scheduled interrupt (1.0 ms min.).
Note
Scheduled interrupt tasks can be executed during execution of the ladder program (even while an instruction
is being executed by stopping the execution of an instruction), I/O refresh, peripheral servicing, or overseeing.
The processing operation in which the scheduled interrupt occurs does not affect the interrupt processing
time.
Scheduled interrupts, however, are not executed during execution of other interrupt tasks even if the interrupt
conditions are satisfied. Instead, the interrupts are executed in order of priority after the current interrupt task
has completed execution and the software interrupt response time has elapsed.As a guideline, the wait time
will be 0 to
3
ms.
Precautions for Correct Use
Precautions for Correct Use
The scheduled task will not be executed while the CPU Unit suspends operation for online editing.
The response times for CPU Units connected via a Serial PLC Link (polling unit to polled unit or polled
unit to polling unit) can be calculated as shown below.
Note
A PT cannot be used in the Serial PLC Link.
A-3-3
Serial PLC Link Response Performance
•
Maximum I/O response time (not including hardware delay) =
Polling unit cycle time + Communications cycle time + Polled unit cycle time + 4 ms
•
Minimum I/O response time (not including hardware delay) =
Polled unit communications time + 0.
8
ms
Number of participat-
ing polled unit nodes
The number of polled units to which links have been established within the
maximum unit number set in the polling unit.
Number of non-
participating polled
unit nodes
The number of polled units not participating in the links within the maximum unit
number set in the polling unit.
Communications cycle
time (ms)
Polled unit communications time × Number of participating polled unit nodes +
10 × Number of non-participating polled unit nodes + 20 × Number of polled unit
nodes
Polled unit
communications
time (ms)
•
Communications time set to
Standard:
0.4 + 0.2
8
6 × [(No. of polled units + 1) × No. of link words × 2 + 12]
•
Communications time set to
Fa
s
t
:
0.4 + 0.0955 × [(No. of polled units + 1) × No. of link words × 2 + 12]
Internal timer:
Sched
u
led
interr
u
pt task:
Sched
u
led interr
u
pt time
Soft
w
are interr
u
pt response time
Summary of Contents for SYSMAC CP Series
Page 3: ......
Page 32: ...1 Overview 1 4 CP2E CPU Unit Software User s Manual W614 ...
Page 44: ...3 CPU Unit Operation 3 8 CP2E CPU Unit Software User s Manual W614 ...
Page 116: ...6 I O Allocation 6 8 CP2E CPU Unit Software User s Manual W614 ...
Page 144: ...7 PLC Setup 7 28 CP2E CPU Unit Software User s Manual W614 ...
Page 170: ...10 Interrupts 10 14 CP2E CPU Unit Software User s Manual W614 ...
Page 200: ...11 High speed Counters 11 30 CP2E CPU Unit Software User s Manual W614 ...
Page 272: ...12 Pulse Outputs 12 72 CP2E CPU Unit Software User s Manual W614 ...
Page 278: ...13 PWM Outputs 13 6 CP2E CPU Unit Software User s Manual W614 ...
Page 460: ...18 Programming Device Operations 18 28 CP2E CPU Unit Software User s Manual W614 ...
Page 576: ...Revision 2 CP2E CPU Unit Software User s Manual W614 ...
Page 577: ......