MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
44
Freescale Semiconductor
MSC711xADS Interfaces
5.5.2
Parallel Port Connection
The optional parallel port connection for an external JTAG device provides these advantages:
• On-board JTAG converter (substituting external converter). Since an on-board JTAG converter is connected to
the host PC parallel port, there is no need for any host program adaptation.
• Fast JTAG download mode. The JTAG connection between the MSC711xADS device and the host PC (with on-
board JTAG TAP master controller -SN74LVT8980A from TI), can exchange data directly with a host PC
parallel port. Necessary extra logic, such as address latches, decoder, and so on, is provided by a PLD from
Altera. This option can load data to the MSC711xADS device approximately 3–4 times faster then a
conventional JTAG converter (
TCK
up to 30 MHz).
5.5.3
JTAG Connection Indicators
Five LEDs indicate the current connection mode:
• Green. JTAG-EPP parallel mode.
• Red. JTAG-SERIAL serial mode.
• Yellow. JTAG-External converter mode.
• Red. I
2
C-PP mode (programming serial boot ROM through the host parallel port).
• Green. I
2
C-CPU mode (Normal mode serial boot ROM connected to the CPU).
5.6 DDR SDRAM Interface
The MSC711x external memory interface has a maximum capacity of 32 bits, but the most common DDR SDRAM
device has a capacity of only 16 bits. Therefore, the MSC711xADS has two DDR SDRAM devices, as shown in
Figure 5-7. Each signal has a 22
Ω
m pull-up resistor. For details on the signals, see the MSC711x Reference
Manual.
9
RST
I/O,P.U.
HRESET Signal
When asserted by external hardware, this signal generates a hard reset sequence for the
MSC7116. This sequence is asserted for 512 MSC7116 system clocks. Pulled Up on the
EVM with a 1K resistor.
CAUTION: Contention on the HRESET may cause permanent damage to either board
logic and/or to the MPC8272 and the MSC711x processors. To prevent
contention, always drive HRESET with an open-drain gate.
10
TMS
I
Test Mode Select
Qualified with TCK in a same way as TDI and changes the state of the JTAG machines.
This line is pulled up internally by the MSC711x.
11
V
DD
P
Connected to the 3.3 V power supply bus. Can be used for command converter power.
12
N.C
—
Not connected.
13
14
TRST
I
Test Port Reset
When this signal is active, it resets the JTAG logic of the MSC711x. This line is pulled down
on the ADS with a 2.2 K resistor to provide a consistent reset of the JTAG logic.
Table 5-2. JTAG/OCE10 Pins (Continued)
Pin
Signal
Attribute
Description
