58
3 Remote Operation
Enable Registers
: These read/write registers define a bitwise mask for their corre‑
sponding event register. If any bit position is set in an event reg‑
ister while the same bit position is also set in the enable register,
then the corresponding summary bit message is set in the Status
Byte. Enable register names end with
SE
or
EN
. The
SRE
register
(Service Request Enable) also acts as an enable register.
Status Byte
: This read‑only register represents the top of the status model, and
is populated with summary bits. Enabled bits within the Status
Byte generate the Master Summary Status bit within the Status
Byte register.
3.5.1
Status Byte (SB) Register
The Status Byte is the top‑level summary of the SR542 status model.
When enabled by the Service Request Enable register, a bit set in the
Status Byte causes the MSS (Master Summary Status) bit to be set.
Weight
Bit
Flag
1
0
undef (0)
2
1
undef (0)
4
2
undef (0)
8
3
undef (0)
16
4
undef (0)
32
5
ESB
64
6
MSS
128
7
CHSB
ESB
: Event Status Bit. Indicates whether one or more of the enabled
events in the Standard Event Status Register is true.
MSS
: Master Summary Status. Indicates whether one or more of the en‑
abled status messages in the Status Byte register is true.
CHSB
: Chopper Status Bit. Indicates whether one or more of the enabled
events in the Chopper Event Status Register is true.
This register is read with the
*STB?
query. The bits of the Status Byte are
not cleared by the
*STB?
query. These bits are only cleared by reading
the underlying event registers, or by clearing the corresponding enable
registers.
3.5.2
Service Request Enable (SRE) Register
Each bit in the SRE corresponds one‑to‑one with a bit in the SB regis‑
ter, and acts as a bitwise AND of the SB flags to generate MSS. Bit 6 of
the SRE is undefined—setting it has no effect, and reading it always re‑
turns 0. This register is set and queried with the
*SRE(?)
command.
At power‑on, this register is cleared.
SR542 Precision Optical Chopper