Hardware Description
8
• Level Sensitive or Edge Triggered
• Programmable Polarity for External Sources
Moreover, all PIO lines can be used to generate a PIO interrupt. However, the PIO lines
can only generate level change interrupts, that is, positive as well as negative edges will
generate an interrupt. The PIO interrupt itself (PIO to AIC line) is usually programmed to
be level-sensitive. Otherwise interrupts will be lost if multiple PIO lines source an interrupt
simultaneously.
On the Stamp9G45 only GPIO interrupts are available. The list of peripheral identifiers,
which are used to program the AIC can be found in Table B.1, “Peripheral Identifiers”
4.6. Battery Backup
The following parts of the AT91SAM9G45 Processor can be backed-up by a battery:
• Slow Clock Oscillator
• Real Time Timer
• Reset Controller
• Shutdown Controller
• RTC
• General Purpose Backup Registers
It is recommended to always use a backup power supply (normally a battery) in order to
speed up the boot-up time and to avoid reset problems.
4.7. Reset Controller (RSTC)
The embedded microcontroller has an integrated Reset Controller which samples the
backup and the core voltage. The presence of a backup voltage (VDDBU) when the card
is powered down speeds up the boot time of the microcontroller.
4.8. Serial Number
Every Stamp9G45 has a unique 48-bit hardware serial number chip which can be used
by application software. The chip is a Dallas
®
one-wire-chip. A Linux driver is provided.
Additionally it functions as the 128 Byte EEPROM.
4.9. Peripheral Input/Output Controller (PIO)
The Stamp9G45 has a maximum of 105 freely programmable digital I/O ports on its
connectors. These pins are also used by other peripheral devices.
The Parallel Input/Output Controller(PIO) manages up to 32 programmable I/O ports. Each
I/O port is associated with a bit number in the 32 bit register of the user interface. Each I/O
