204
A
ctiv
at
e app_console (mix
er bod
y application)
St
ar
t opening animation
(LCD)
CH C
olor Of
f
・
Opening windo
w displa
y st
ar
t
・
A
ctiv
at
e all thr
eads
Pa
rallel pr
ocessing r
equir
ed f
or
q
,
w
,
e
, and
r
belo
w!
q
Memor
y s
y
s
tem initialization
・
C
o
p
y
dat
a fr
om eMMC t
o
DDR2
・
Bat
te
ry
Chec
k
:
・
Memor
y s
y
s
tem r
eady
w
P
anel P
rocessing Initialization
・
St
ar
t comm
unication with panel sub CPU (I2C2)
・
St
ar
t-up mode decision
・
P
anel sub CPU v
e
rsion chec
k (I2C2)
・
(In the case of a v
e
rsion mismatch)
Updat
e of sub CPU (I2C2)
・
P
anel pr
ocessing r
eady
e
R
ecor
der pr
ocessing initialization
・
St
ar
t comm
unication with PIC CPU
(U
AR
T1)
・
PIC CPU
V
e
rsion Chec
k (U
AR
T1)
・
(In the case of a v
e
rsion mismatch)
Updat
e of PIC CPU (U
AR
T1)
・
R
ecor
der pr
ocessing r
eady
r
DSP initialization pr
ocessing
・
CPLD r
egist
er initialization (I2C1)
・
CPLD m
u
te
(I2C1)
IC905->CN904:SD
A_PN, SCL_PN
* I2C2 al
w
a
y
s
uses this contr
ol line
IC905<->IC651:MFI_RXD
, MFI_TXD
* U
A
R
T1 al
w
a
y
s
uses this contr
ol line
IC905<->IC802:SCL_CPLD
, SCL_CPLD
* I2C1 al
w
a
y
s
uses this contr
ol line
IC802
：
/MUTEOUT
IC802
：
MUTEOUT[1][2]
・
St
ar
t comm
unication with MAIN CPU
・
(F
ir
mw
ar
e Updat
e)
・
St
ar
t comm
unication with MAIN CPU
・
(F
ir
mw
ar
e Updat
e)
・
St
ar
t f
ir
m
w
a
re
tr
ansf
er t
o
DSP (SPI0)
:
IC905<
->DSP:/SPI0̲CS̲DSPx, /SPI0̲ENA̲DSP, /SPI0̲CLK̲DSPx, /SPI0̲MOSI̲D
SPx, /SPI0̲MISO̲DSP
* SPI0 always uses this control line
・
St
ar
t f
ir
m
w
a
re
r
eception
:
Exit opening animation
(LCD)
・
End f
ir
m
w
a
re
tr
ansf
er t
o
DSP (SPI0)
・
Def
ault set
tings t
o
DSP (SPI0)
・
W
aiting f
or completion of
q
・
C
alculation and tr
ansf
er of all par
amet
er
s (SPI0)
・
Exit opening
・
Chec
k if all st
ar
t-up conditions ar
e met
・
End f
ir
m
w
a
re
r
eception
・
St
ar
t f
ir
m
w
a
re
・
St
ar
t dat
a tr
ansmission and r
eception
:
(A
udio pr
ocessing is not
perf
or
med dur
ing this per
iod)
Nor
mal / Dia
gnostic / Maint
enance Oper
ations Star
t
・
Nor
mal oper
ation st
ar
t
・
Nor
mal oper
ation st
ar
t
・
CPLD unmute (I2C1)
St
ar
t audio output
Nor
mal displa
y(P
anel)
Nor
mal scr
een(LCD)
IC802
：
/MUTEOUT
IC802
：
MUTEOUT[1] [2]
・
St
ar
t audio pr
ocessing
TF5/TF3/TF1
Summary of Contents for TF5
Page 10: ...10 TF5 TF3 TF1 866 716 225 599 225 599 TF5 TF3 Unit mm Unit mm DIMENSIONS...
Page 11: ...11 TF5 TF3 TF1 225 510 599 TF1 Unit mm...
Page 110: ...B B MAIN MAINCOM Circuit Board 2NA0 ZJ06330 3 110 TF5 TF3 TF1...
Page 111: ...B B Scale 90 100 Pattern side 2NA0 ZJ06330 3 111 TF5 TF3 TF1...
Page 113: ...WR 1 WR 1 DA2 Circuit Board Scale 90 100 Component side 2NA ZJ06430 2 113 TF5 TF3 TF1...
Page 116: ...WR 1 WR 1 7 WR 32 5 6 C C PS Circuit Board 2NA ZJ06320 2 116 TF5 TF3 TF1...
Page 119: ...Component side D D Component side 2NA ZJ06380 4 119 TF5 TF3 TF1...
Page 166: ...TF5 TF3 TF1 166 q w e r PLAY q PASS FAIL w CLOSE USER DEFINED KEYS B...
Page 202: ...TF5 TF3 TF1 202 7 SYSTEM SETUP ABOUT 8 HOME Initialize All Memory CANCEL OK OK EXIT...
