Operation Theory
33
for the relationship between the 8-bit trigger level and the trigger
voltage.
The trigger is detected while the trigger event occurs. For Post-
trigger and Middle-trigger, the data acquisition is performed after
the trigger event; however, the time when the AD conversion starts
is 350ns slower than the time when the trigger is detected. This
350ns delay will have minor effect for high-speed data acquisition.
Trigger polarity:
trigger slope ‘0’ value means positive trigger and
‘1’ value means negative trigger.
Trigger Sources
Internal Trigger
An internal trigger is a software trigger. The trigger event
occurs when you call _9812_AD_DMA_Start( ) function to start
the operation.
External Analog Trigger
You can use the signal on any analog input channel (CH0,
CH1, CH2, or CH3) as the trigger signal for external analog
trigger. The trigger conditions for analog triggers are described
as follows:
Positive-slope trigger
The trigger event occurs the first time the trigger signal (analog
input signal) changes from a voltage that is lower than the
specified trigger level to a voltage that is higher than the
specified trigger level.
Negative-slope trigger
The trigger event occurs the first time the trigger signal (analog
input signal) changes from a voltage that is higher then the
specified trigger level to a voltage that is lower than the
specified trigger level.
Summary of Contents for NuDAQ PCI-9810
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