Chapter 2
Channel Operation
page 2 - 6
Excalibur Systems
Read
The Global Interrupt register indicates the channel’s interrupt status. The
Channel
Interrupt Clear Register
resets the status bits.
Write
Writing any value to the Global Time Tag Reset register reset’s the module’s Time
Tag Counter.
Read
The two Global Time Tag Counter words represent the current value of the free-
running 32-bit Time Tag counter. The counter may be read at any time. Keep the
following read sequence:
The resolution of the counter is 10
μ
sec. The counter is reset to 0 upon power-up or
software reset or through the
Global Time Tag Reset Register
. After the reset operation,
the counter starts counting. When the counter reaches the value FFFF FFFF (H), it
wraps around to 0 and continues counting.
2.2.5
Global Interrupt Status Register
Address:
00808 (H)
Bit
Bit Name
Description
02-15
Reserved Set
to
0
01
IS1
Channel 1 Interrupt Status
0 = Bit not active
1 = Interrupt active
00
IS0
Channel 0 Interrupt Status
0 = Bit not active
1 = Interrupt active
Channel Interrupt Status Register
2.2.6
Global Time Tag Reset Register
Address:
0080A (H)
2.2.7
Global Time Tag Counter
Address:
0080C (H)
0080E (H)
FIRST:
0080C H (Lo Word - LSB)
LAST:
0080E H (Hi Word - MSB)
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