viii
5
IEEE-488 Programming
Figure 5-1
Flowchart of example program .................................................................................................................. 5-2
Figure 5-2
IEEE-488 connector ................................................................................................................................... 5-3
Figure 5-3
IEEE-488 connections ............................................................................................................................... 5-3
Figure 5-4
IEEE-488 connector location ..................................................................................................................... 5-4
Figure 5-5
Contact assignments .................................................................................................................................. 5-4
Figure 5-6
IEEE-488 bus connector and rotary selection switches ............................................................................. 5-6
Figure 5-7
IEEE-488 indicators ................................................................................................................................... 5-8
Figure 5-8
Digital I/O status display mode ................................................................................................................. 5-9
Figure 5-9
External trigger pulse ............................................................................................................................... 5-15
Figure 5-10
Matrix ready pulse ................................................................................................................................... 5-16
Figure 5-11
G0 and G1 full output formats ................................................................................................................. 5-21
Figure 5-12
G2 and G3 inspect output formats ........................................................................................................... 5-22
Figure 5-13
G4 and G5 condensed output formats ..................................................................................................... 5-22
Figure 5-14
G6 and G7 binary output formats ............................................................................................................ 5-23
Figure 5-15
SRQ mask and serial poll byte format ..................................................................................................... 5-26
Figure 5-16
READY and MATRIX READY signal timing ....................................................................................... 5-31
Figure 5-17
U0 machine status word ........................................................................................................................... 5-33
Figure 5-18
U1 error status word ................................................................................................................................ 5-33
Figure 5-19
U3 relay step pointer ................................................................................................................................ 5-34
Figure 5-20
U4 number of slaves ................................................................................................................................ 5-35
Figure 5-21
U5 card identification .............................................................................................................................. 5-35
Figure 5-22
U6 relay settling time ............................................................................................................................... 5-35
Figure 5-23
U7 digital input ........................................................................................................................................ 5-36
6
Principles of Operation
Figure 6-1
Model 708A block diagram ....................................................................................................................... 6-1
Figure 6-2
Digital board block diagram ...................................................................................................................... 6-2
Figure 6-3
RAM and battery backup ........................................................................................................................... 6-4
Figure 6-4
Matrix card interface simplified schematic ............................................................................................... 6-5
Figure 6-5
Matrix card interface timing diagram ........................................................................................................ 6-6
Figure 6-6
Typical matrix card logic block diagram ................................................................................................... 6-7
Figure 6-7
IDDATA timing diagram .......................................................................................................................... 6-7
Figure 6-8
Display board block diagram ..................................................................................................................... 6-9
Figure 6-9
Display interface simplified schematic ...................................................................................................... 6-9
Figure 6-10
Light pen interface simplified schematic ................................................................................................. 6-12
Figure 6-11
Master/slave interface simplified schematic ............................................................................................ 6-13
Figure 6-12
Digital I/O interface simplified schematic ............................................................................................... 6-15
7
Maintenance
Figure 7-1
Rack installation ........................................................................................................................................ 7-2
Figure 7-2
Screw and dress panel removal .................................................................................................................. 7-4
Figure 7-3
W101 jumper location ............................................................................................................................... 7-6
Figure 7-4
Troubleshooting programs ......................................................................................................................... 7-8
Figure 7-5
Relay control waveforms ......................................................................................................................... 7-12
Figure 7-6
Display interface waveforms ................................................................................................................... 7-12
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