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7-2

Section

Interrupt Functions

7-2

Interrupt Functions

7-2-1 Overview

The Customizable Counter Unit supports the following interrupts.

Executing Interrupt Programs in the Customizable Counter Unit

The interrupt routines that are executed for all of the following interrupts are pro-
grammed as subroutines. Subroutines are defined between SBN(92) and
RET(93) following the main program.

Contact inputs 0 to 3 to the Customizable Counter Unit can be set as interrupt
inputs. If they are set for Input Interrupt Mode, an interrupt will be generated
when the input turns ON, OFF, or both. If they are set for Counter Mode, an inter-
rupt will be generated when a specified counter value is reached.

An interrupt will be generated for an interval timer that can be set to a precision of
0.1 ms.

An interrupt will be generated when the PV of the counter equals a preset target
value.

An interrupt will be generated when the PV of the pulse output equals a preset
target value.

Note Other than interrupts, bit patterns can also be output internally when the PV is

within a specified range in Range Comparison Mode. High-speed counter PVs,
pulse output PVs, pulse counter timer PVs, and one-shot pulse elapsed times
can be used as the PVs for bit pattern output.

Executing Interrupt Programs in the CPU Unit

The MCRO instruction can be executed in the Customizable Counter Unit to
generate an external interrupt to the CPU Unit to execute an external interrupt
task.

7-2-2 Interrupt Priority

The specified subroutine will be executed when an interrupt is generated. The
priority of interrupts is shown below.

Input interrupts

Interval timer
interrupts

Pulse output
interrupts

High-speed
counter interrupts

If an interrupt with a higher priority occurs when an interrupt is being processed,
the current interrupt will be interrupted to execute the higher-priority interrupt.
When the subroutine for the higher-priority interrupt has been completed, proc-
essing of the previous interrupt will be continued.

If an interrupt with the same or a lower priority occurs when an interrupt is being
processed, the current interrupt will be completed and then the new interrupt will
be processed.

If interrupts of the same priority occur simultaneously, they will be processed in
the following order.

•

Input interrupt 0, Input interrupt 1, Input interrupt 2, Input interrupt 3

•

Interval timer interrupt, Pulse output 1 interrupt, Pulse output 2 interrupt, High-
speed counter 1 interrupt, High-speed counter 2 interrupt

An instruction controlling a port operation cannot be programmed in a subrou-
tine if an instruction in the main program is already controlling pulse I/O or a high-
speed counter for the same port. If this is attempted, SR 25503 will turn ON. The
following instructions are included: INI, PRV, CTBL, SPED, PULS, PLS2, ACC,
and STIM.

Input Interrupts

Interval Timer Interrupts

High-speed Counter
Interrupts

Pulse Output Interrupts