Interrupt Controller (8259A)
Initialization Control Words (ICW1-4)
Initialization of the PIC consists of writing from three to four bytes, or
Initialization Control Words (ICWs), to the PIC in the proper order.
The format of these ICWs is shown on page 12-13. The sequence in
which these words are programmed is in order of their names, ICW1
through ICW4. ICW1, ICW2, and ICW4 are always required; ICW3
is not always programmed, depending upon the information supplied
in ICW1 and ICW2.
ICW1
The first Initialization Control Word (ICW1), required in all modes of
operation, is located at I/O address 20h. ICW1 consists of the
following:
a)
Bits 0 and 4 are both logical 1s and identify the word as ICW1
for an 8088 CPU operation.
b)
Bit 1 denotes whether or not the PIC is employed in a multiple
PIC configuration. In other words, code bit 1 = logical 1 if no
slave PIC is interfaced to the master PIC via the STD bus.
c)
Bits 2, 5, 6, and 7 are "don’t care" and are normally coded as
logical 0s.
d)
Bit 3 establishes whether the interrupts are requested by a low-
to-high transition input at the interrupt controller and is referred
to as "edge-triggered mode." This applies to all input requests
handled by the PIC. In other words, if bit 3 = 0, a low-to-high
transition is required to request an interrupt on any of the eight
levels handled by the PIC.
12-12
