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Specifications and clearance method of comparator output
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Comparator output
Cutput specification
Clearance method
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Address counter
Selection
Clear by detection condition false
ADWIWT
CCMP1
・ CCMP1 detection condition true ・
Clear at the end of STATCS4 PCWT reading
CCMP2
・ CCMP2 detection condition true ・
Clear by IWT FACTCW CLW command
CCMP3
・ CCMP3 detection condition true ・
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Pulse counter
Selection
Clear by detection condition false
CWTIWT
CCMP1
・ CCMP1 detection condition true ・
Clear at the end of STATCS4 PCWT reading
CCMP2
・ CCMP2 detection condition true ・
Clear by IWT FACTCW CLW command
CCMP3
・ CCMP3 detection condition true ・
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Pulse differential counter
Selection
Clear by detection condition false
DFLIWT
CCMP1
・ CCMP1 detection condition true ・
Clear at the end of STATCS4 PCWT reading
CCMP2
・ CCMP2 detection condition true ・
Clear by IWT FACTCW CLW command
CCMP3
・ CCMP3 detection condition true ・
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Pulse cycle counter
Selection
Clear by detection condition false
SPDIWT
CCMP1
・ CCMP1 detection condition true ・
Clear at the end of STATCS4 PCWT reading
CCMP2
・ CCMP2 detection condition true ・
Clear by IWT FACTCW CLW command
CCMP3
・ CCMP3 detection condition true ・
● The detection condition of comparator CCMP1 is "Counter value = CCMPAWE WEWISTEW1 value."
Select the detection conditions of comparators CCMP2 and CCMP3 from ≧ , ≦ , and =.
The counter value detection methods for the DFL counter include absolute value detection and signed
detection.
Set a comparator detection condition in CCMP TYPE of the CCCWTEW IWITIALIZE2 command.
● Comparators CCMP1, CCMP2, and CCMP3 have the following output functions.
・ The match output of a comparator can be selected from level latch output, edge latch output, and
through-output.
・ Pulse output can be put into slow or immediate stop by the match output of the comparator.
・ CCMP1, CCMP2, and CCMP3 can be output in combination to counter interrupt request SIWWAL CCTA/B.
・ The match output of CCMP1 includes a counter ACTC CLEAW function (*1) and detected-data reload
function.
Set these functions with the CCCWTEW IWITIALIZE1 command.
1
An address counter is excluded.
*
● By setting the count data latch and clearance functions, count data can be latched and cleared by
detecting a latch timing.
Wead latch data with the DFL LATCH PCWT SELECT command and specify it.
The data can be read at all times from the DWIVE DATA1,2,3 PCWT.
ACTC CLEAW function
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When the match output of CCMP1 is detected, the pulse counter, pulse differential counter, and pulse
speed counter are reset to 0.
When the match output of CCMP1 is through, its data is output with the minimum output width of the
match output.
Although this counter part has an initial output width of 200 ns, its data can be trigger-output
with the output width extended up to 65.535 ms by setting the output with the HAWD CCWFIWCWATICW
CCMMAWD.
Weload function
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When the match output of CCMP1 is detected, the data that is stored in the CCCWTEW DATA2,3 PCWT is
set again in CCMPAWE WEWISTEW 1.
When the match output of CCMP1 is through, its data is output with the minimum output width of the
match output.
Although this counter part has an initial output width of 200 ns, its data can be trigger-output
with the output width extended up to 65.535 ms by setting the output with the HAWD CCWFIWCWATICW
CCMMAWD.