Hardware Manual for the PCD3 Series│Document 26/789; Version E 5│31.01.2005
Saia-Burgess
Controls Ltd.
Hardware clock / hardware watchdog
PCD3.Mxxx0 Classic CPUs and expansion housings
3-27
3
3.14
Hardware clock (Real Time Clock)
The PCD3 CPUs are fitted with a hardware clock on the motherboard:
The presence of a hardware clock is an absolute requirement where the HeaVAC
library clock timers are used.
3.15
Hardware watchdog
PCD3 CPUs are fitted with a hardware watchdog as standard. A relay at I/O address
255 can be triggered; this remains activated as long as the status of O 255 changes
periodically at least every 200 ms. Within PG5, FBoxes are provided for this purpose.
If for any reason the program component with the watchdog FBox is no longer being
processed at sufficiently short intervals, the watchdog relay will drop out and the
amber watchdog LED will go out. Please read online help for more details on these
FBoxes.
The same function can also be implemented with IL (AWL) instructions.This example
works
independently of the cycle time
of the user program. In the event of loops
caused by the programmer, the watchdog does not drop out.
Example
:
ACC H
;Invert Output 255
COM O 255
With the code shown in the example, the watchdog also drops out in the case of
loops caused by the programmer. With regard to the cycle time of the user program,
please note:
With cycle times of more than 200 ms, the code sequence must be repeated
several times in the user program, to prevent a drop-out of the watchdog in normal
operation.
As address 255 is in the normal I/O range, there are restrictions on the permissible
I/O modules in certain sockets:
CPU type
Restrictions
PCD3.Mxxx0
1) No analogue, counter and motion control modules on the
socket with base address 240 (apart from PCD3.W3x5 and
PCD3.W6x5, which are not affected by the watchdog)
2) Output 255 cannot be used for digital I/O modules either
