482
Appendix B
Status Reporting System
Status Register Structure
Issuing the
command will clear all of the bits from the status byte register.
Table B-1
Status Bit Definitions of Status Byte Register
Bit
Position
Name
Description
0, 1
Not used
Always 0.
2
Error/Event Queue
Set to “1” if error/event queue contains data; reset to “0”
when all data has been retrieved.
3
Questionable Status Register
Summary
Set to “1” when one of the enabled bits in status event
status register is set to “1.”
4
MAV (Message Available)
Set to “1” when output queue contains data; reset to “0”
when all data has been retrieved.
5
Standard Event Status Register
Summary
Set to “1” when one of the enabled bits in status event
status register is set to “1.”
6
RQS/MSS
Set to “1” when any of the status byte register bits enabled
by service request enable register is set to “1”; reset to “0”
when all data has been retrieved through serial polling.
See IEEE 488.1 and IEEE 488.2 standards for details.
7
Operation Status Register
Summary
Set to “1” when one of the enabled bits in operational
status register is set to “1.”
Summary of Contents for E5052A
Page 4: ...4 ...
Page 28: ...28 1 Making Effective Use of This Manual How to Use This Manual ...
Page 51: ...3 51 Making a Measurement Trigger System 3 Making a Measurement Figure 3 1 Trigger system ...
Page 58: ...58 3 Making a Measurement Waiting for End of measurement ...
Page 76: ...76 4 Reading Writing Measurement Data Entering Data in a Trace ...
Page 82: ...82 Chapter5 Saving and Recalling File Management Managing Files ...
