6.5
Status System
APS-1102 Programmable AC/DC Power Source
6-44
6.5.1
Status byte
The status byte register definitions are listed in
Table 6-13
. Bits in the status byte register become valid
when 1 is set in the service request enable register, then the ORed result of the valid bits is taken to issue
a service request.
A status byte can be read by the serial poll or an
STB? query.
Table 6-13. Status Byte Register Definitions
Bit Weight
Description
OPR (7)
128
Operation status summary
RQS/MSS
(6)
64
During the serial poll, this bit is defined as the RQS (Request Service) which
indicates whether a service request has been issued to the controller by a device.
This bit is cleared to zero when the serial poll is used.
When using an
STB? query, this bit is defined as the MSS (Master Status
Summary), and operates as the status byte summary bit. MSS is not cleared until
there are no more enabling factors.
ESB (5)
32
The ESB (Event Status Bit) operates as the standard event status register summary
bit. This bit is set (= 1) when any valid bit in the standard event status register is set
(= 1), and is cleared to zero when all bits in that register are 0.
MAV (4)
16
The MAV (Message Available Bit) is set (= 1) when a response to a query is written
to the corresponding response message queue and prepared for output.
This bit is cleared to zero when the response message queue becomes empty.
3
8
Always 0 (not used)
2
4
Always 0 (not used)
WAR (1)
2
Warning status summary
0
1
Always 0 (not used)
a) Checking status when a query is issued
Once a query command has been issued, the answer to the query will be correctly received by
receiving the response message by ordinary. There is no particular need to check the MAV bit in the
status byte. To continue processing while checking the MAV bit, once the query command has been
sent, confirm that the MAV bit = 1 in the status byte by serial poll, then read the response message and
confirm that the MAV bit has been cleared to zero before proceeding to the next operation.
