Guppy PRO Technical Manual
V4.1.2
189
And finally, the entry with key 40 (448h in this case) provides the offset for the
camera control register:
FFFF F00 3C0000h × 4 = FFFF F0F00000h
The base address of the camera control register is thus:
FFFF F0F00000h
The offset entered in the table always refers to the base address of F0F00000h.
Implemented registers (IIDC V1.31)
The following tables show how standard registers from IIDC V1.31 are
implemented in the camera:
•
Base address is F0F00000h
•
Differences and explanations can be found in the Description column.
Camera initialize register
Inquiry register for video format
Offset
Name
Description
000h
INITIALIZE
Assert MSB = 1 for Init.
Table 109: Camera initialize register
Offset
Name
Field
Bit
Description
100h
V_FORMAT_INQ
Format_0
[0]
Up to VGA (non compressed)
Format_1
[1]
SVGA to XGA
Format_2
[2]
SXGA to UXGA
Format_3
[3 to 5]
Reserved
Format_6
[6]
Still Image Format
Format_7
[7]
Partial Image Format
---
[8 to 31]
Reserved
Table 110: Format inquiry register
