SERIES IP330 INDUSTRIAL I/O PACK 16-BIT HIGH DENSITY ANALOG INPUT MODULE
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- 10 -
End Channel Value Register
Unused
End Channel Value
15 14 13
12
11
10
09
08
New Data Registers (Read Only, 08H to 0BH)
The New Data registers can be read to determine which
channels of the Mail Box buffer contain new converted data. A set
bit in the New Data register indicates that the Mail Box buffer,
corresponding to the channel of the set bit, contains new
converted data. A set New Data register bit is cleared upon a read
of its corresponding Mail Box buffer.
The New Data bits are also cleared at the start of all new data
acquisition cycles initiated with either the Software Start Convert
command or an external trigger. This is done to avoid mistaking
data from an old scan cycle with that of a new scan cycle.
The New Data registers can be read via 16-bit or 8-bit data
transfers. In addition, the register contents are cleared upon reset.
New Data Register (Read Only, 09H)
Data
Bit
07 06 05 04 03 02 01 00
SE
or
Diff.
Ch.
l 07 06 05 04 03 02 01 00
New Data Register (Read Only 08H)
Data
Bit
15 14 13 12 11 10 09 08
SE
or
Diff.
Ch. 15 14 13 12 11 10 09 08
New Data Register (Read Only 0BH)
Data
Bit
07 06 05 04 03 02 01 00
SE
Channel 23 22 21 20 19 18 17 16
Diff.
Channel 07 06 05 04 03 02 01 00
New Data Register (Read Only 0AH)
Data
Bit
15 14 13 12 11 10 09 08
SE
Channel 31 30 29 28 27 26 25 24
Diff.
Channel 15 14 13 12 11 10 09 08
Missed Data Registers (Read Only, 0CH to 0FH)
The Missed Data registers can be read to determine if a
channel’s Mail Box buffer has been overwritten with new converted
data before the last converted value was read. A set bit in the
Missed Data register indicates a converted value corresponding to
the channel of the set bit was overwritten before being read. A set
Missed Data register bit is cleared upon a read of its
corresponding Mail Box buffer.
The Missed Data bits are also cleared at the start of all new
data acquisition cycles initiated with either the Software Start
Convert command or an external trigger. This is done to avoid
mistaking missed data from an old scan cycle with that of a new
scan cycle.
The Missed Data registers can be read via 16-bit or 8-bit data
transfers. In addition, the register contents are cleared upon reset.
Missed Data Register (Read Only, 0DH)
Data
Bit
07 06 05 04 03 02 01 00
SE
or
Diff.
Ch. 07 06 05 04 03 02 01 00
Missed Data Register (Read Only 0CH)
Data
Bit
15 14 13 12 11 10 09 08
SE
or
Diff.
Ch. 15 14 13 12 11 10 09 08
Missed Data Register (Read Only 0FH)
Data
Bit
07 06 05 04 03 02 01 00
SE
Channel 23 22 21 20 19 18 17 16
Diff.
Channel 07 06 05 04 03 02 01 00
Missed Data Register (Read Only 0EH)
Data
Bit
15 14 13 12 11 10 09 08
SE
Channel 31 30 29 28 27 26 25 24
Diff.
Channel 15 14 13 12 11 10 09 08
Start Convert Register (Write Only, 11H)
The Start Convert register is a write-only register and is used
to trigger conversions by setting data bit-0 of this register to a logic
one. The desired mode of data acquisition must first be
configured by setting the following registers to the desired values
and modes: Control, Interrupt Vector, Timer Prescaler, Conversion
Timer, Start Channel Value, End Channel Value, and Gain Select.
This register can be written with either a 16-bit or 8-bit data
value. Data bit-0 must be a logic one to initiate data conversions.
For the External Trigger Only mode the Software Start Convert
bit is not used to start data acquisition. However, the Start
Convert bit should be set prior to the first external trigger. In this
mode the Start Convert bit serves as a means for the hardware to
identify the occurrence of the first External Trigger. On the first
external trigger (given the Software Start Convert bit is set)
converted data from the A/D Converter is not written to the Mail
Box buffer since it is old convert data. See the Convert On
External Trigger Only-Mode (in the Modes of Opertion section) for
additional details.
Start Convert Register
Not Used
Start Convert
07 06 05 04 03 02 01
00
At least 5
µ
seconds of data acquire time should be provided
after programming of the Control register, Start Value register, and
Gain Selects before a Software Start Convert command is issued.
These configuration registers control the IP330 on board
multiplexers and programmable gain amplifier which, respectively,
control the channel and gain selected for the input provided to the
converter.
Gain Select Registers (Read/Write, 20H - 3FH)
The Gain Select registers are read/writeable and are used to
individually select the gain corresponding to each of the 32
channels.
The Gain Select registers are the only registers in
the IP330 that must be accessed via byte transfers only
. See
Table 3.2 which lists the Gain Select register addresses
corresponding to each of the 32 channels. In differential mode,
Gain Select registers corresponding to channels 0 to 15 are
utilized.
The four gain settings supported (1, 2, 4, and 8) are listed in
Table 3.6 with their correspond binary select code. A gain can be
selected by writing the desired binary code to the least significant
two bits of a given Gain Select register.