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SERIES IP330 INDUSTRIAL I/O PACK                                  16-BIT HIGH DENSITY ANALOG INPUT MODULE 
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- 10 - 

End Channel Value Register

 

Unused 

End Channel Value 

15     14     13 

12 

11 

10 

09 

08 

 

New Data Registers (Read Only, 08H to 0BH) 
 

The New Data registers can be read to determine which 

channels of the Mail Box buffer contain new converted data.  A set 
bit in the New Data register indicates that the Mail Box buffer, 
corresponding to the channel of the set bit, contains new 
converted data.  A set New Data register bit is cleared upon a read 
of its corresponding Mail Box buffer.   

 
The New Data bits are also cleared at the start of all new data 

acquisition cycles initiated with either the Software Start Convert 
command or an external trigger.  This is done to avoid mistaking 
data from an old scan cycle with that of a new scan cycle.  

 
The New Data registers can be read via 16-bit or 8-bit data 

transfers.  In addition, the register contents are cleared upon reset. 

 

New Data Register (Read Only, 09H)

 

Data 

Bit 

07 06 05 04 03 02 01 00 

SE 

or 

Diff. 

Ch. 

l 07 06 05 04 03 02 01 00 

New Data Register (Read Only 08H)

 

Data 

Bit 

15 14 13 12 11 10 09 08 

SE 

or 

Diff. 

Ch.  15 14 13 12 11 10 09 08 

New Data Register (Read Only 0BH)

 

Data 

Bit 

07 06 05 04 03 02 01 00 

SE 

Channel  23 22 21 20 19 18 17 16 

Diff. 

Channel  07 06 05 04 03 02 01 00 

New Data Register (Read Only 0AH)

 

Data 

Bit 

15 14 13 12 11 10 09 08 

SE 

Channel  31 30 29 28 27 26 25 24 

Diff. 

Channel  15 14 13 12 11 10 09 08 

 

 
Missed Data Registers (Read Only, 0CH to 0FH) 
 

The Missed Data registers can be read to determine if a 

channel’s Mail Box buffer has been overwritten with new converted 
data before the last converted value was read.  A set bit in the 
Missed Data register indicates a converted value corresponding to 
the channel of the set bit was overwritten before being read.  A set 
Missed Data register bit is cleared upon a read of its 
corresponding Mail Box buffer.  

 
The Missed Data bits are also cleared at the start of all new 

data acquisition cycles initiated with either the Software Start 
Convert command or an external trigger.  This is done to avoid 
mistaking missed data from an old scan cycle with that of a new 
scan cycle.  

The Missed Data registers can be read via 16-bit or 8-bit data 

transfers.  In addition, the register contents are cleared upon reset. 

 

Missed Data Register (Read Only, 0DH)

 

Data 

Bit 

07 06 05 04 03 02 01 00 

SE 

or 

Diff. 

Ch.  07 06 05 04 03 02 01 00 

Missed Data Register (Read Only 0CH)

 

Data 

Bit 

15 14 13 12 11 10 09 08 

SE 

or 

Diff. 

Ch.  15 14 13 12 11 10 09 08 

 

Missed Data Register (Read Only 0FH)

 

Data 

Bit 

07 06 05 04 03 02 01 00 

SE 

Channel  23 22 21 20 19 18 17 16 

Diff. 

Channel  07 06 05 04 03 02 01 00 

Missed Data Register (Read Only 0EH)

 

Data 

Bit 

15 14 13 12 11 10 09 08 

SE 

Channel  31 30 29 28 27 26 25 24 

Diff. 

Channel  15 14 13 12 11 10 09 08 

 

Start Convert Register (Write Only, 11H) 
 

The Start Convert register is a write-only register and is used 

to trigger conversions by setting data bit-0 of this register to a logic 
one.  The desired mode of data acquisition must first be 
configured by setting the following registers to the desired values 
and modes: Control, Interrupt Vector, Timer Prescaler, Conversion 
Timer, Start Channel Value, End Channel Value, and Gain Select. 

 
This register can be written with either a 16-bit or 8-bit data  

value.  Data bit-0 must be a logic one to initiate data conversions. 

 
For the External Trigger Only mode the Software Start Convert 

bit is not used to start data acquisition.  However, the Start 
Convert bit should be set prior to the first external trigger.  In this 
mode the Start Convert bit serves as a means for the hardware to 
identify the occurrence of the first External Trigger.  On the first 
external trigger (given the Software Start Convert bit is set) 
converted data from the A/D Converter is not written to the Mail 
Box buffer since it is old convert data.  See the Convert On 
External Trigger Only-Mode (in the Modes of Opertion section) for 
additional details. 
 

Start Convert Register

 

Not Used 

Start Convert 

07 06 05 04 03 02 01 

00 

 

At least 5

µ

 seconds of data acquire time should be provided 

after programming of the Control register, Start Value register, and 
Gain Selects before a Software Start Convert command is issued.  
These configuration registers control the IP330 on board 
multiplexers and programmable gain amplifier which, respectively, 
control the channel and gain selected for the input provided to the 
converter. 
 

Gain Select Registers (Read/Write, 20H - 3FH) 
 

The Gain Select registers are read/writeable and are used to 

individually select the gain corresponding to each of the 32 
channels.  

The Gain Select registers are the only registers in 

the IP330 that must be accessed via byte transfers only

.  See 

Table 3.2 which lists the Gain Select register addresses 
corresponding to each of the 32 channels.  In differential mode, 
Gain Select registers corresponding to channels 0 to 15 are 
utilized. 

 
The four gain settings supported (1, 2, 4, and 8) are listed in 

Table 3.6 with their correspond binary select code.  A gain can be 
selected by writing the desired binary code to the least significant 
two bits of a given Gain Select register. 
 
 
 
 

Summary of Contents for IP330 Series

Page 1: ...ut Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 1995 Acromag Inc Printed in the USA Data and speci...

Page 2: ...NCE 19 PRELIMINARY SERVICE PROCEDURE 19 6 0 SPECIFICATIONS 20 GENERAL SPECIFICATIONS 20 ANALOG INPUT 20 INDUSTRIAL I O PACK COMPLIANCE 21 APPENDIX 21 CABLE MODEL 5025 551 21 Recommended APC8600 Shiele...

Page 3: ...le ended channels Precision On Board Calibration Voltages Calibration autozero and autospan precision voltages are available to permit host computer correction of conversion errors Trimmed calibration...

Page 4: ...Library diskette Model IPSW LIB M03 MSDOS format to simplify communication with the board Example software functions are provided for both VMEbus and ISA bus PC AT applications All functions are writ...

Page 5: ...iguration Software configurable control registers are provided for control of external trigger mode data output format acquisition mode timer control interrupt mode convert channel s selection and cha...

Page 6: ...l has been driven low it should remain low for a minimum of 500n seconds As an output an active low TTL signal can be driven to additional IP330s thus providing a means to synchronize the conversions...

Page 7: ...elect Ch 07 27 28 Gain Select Ch 08 Gain Select Ch 09 29 2A Gain Select Ch 10 Gain Select Ch 11 2B 2C Gain Select Ch 12 Gain Select Ch 13 2D 2E Gain Select Ch 14 Gain Select Ch 15 2F 30 Gain Select Ch...

Page 8: ...10 Uniform Single 011 Burst Continuous 100 Burst Single 101 Convert on External Trigger Only 110 Not Used 111 Not Used See the Modes of Operation section for a description of each of these scan modes...

Page 9: ...z clock signal The output of this clock is input to the second counter the Conversion Timer and the output is used to generate periodic trigger pulses The time period between trigger pulses is describ...

Page 10: ...y 0CH Data Bit 15 14 13 12 11 10 09 08 SE or Diff Ch 15 14 13 12 11 10 09 08 Missed Data Register Read Only 0FH Data Bit 07 06 05 04 03 02 01 00 SE Channel 23 22 21 20 19 18 17 16 Diff Channel 07 06 0...

Page 11: ...niform continuous uniform single burst continuous burst single and convert on external trigger only In all modes a single channel or a sequence of channels may be converted The following sections desc...

Page 12: ...Box functions as a dual level data buffer The first half of the Mail Box is used to store all selected channel data for the initial pass through the channels defined by the Start and End Value regist...

Page 13: ...external trigger pulse no interrupt will be issued since data is not written to the Mail Box buffer If interrupt upon completion of a group of channels is selected an interrupt will be issued 8 secon...

Page 14: ...5 2 0 to 5 0 6125 CAL3 2 4500 CAL1 Input Range Volts PGA Gain ADC Range Volts Rec Low Calib Voltage VoltCALLO Volts Rec High Calib Voltage VoltCALHI Volts 0 to 1 25 4 0 to 5 0 6125 CAL3 1 2250 CAL2 0...

Page 15: ...are known It is now possible to correct input channel data from any input channel using the same input range i e 10 to 10 volts with a PGA gain 1 Repeat the above steps periodically to re measure the...

Page 16: ...CountCALHI Calculate Equation 2 Calculate m actual_slope from equation 2 since all parameters are known It is now possible to correct input channel data from any input channel using the same input ra...

Page 17: ...he host uses the vector to form a pointer to an interrupt service routine for the interrupt handler to begin execution 7 Example of Generic Interrupt Handler Actions a Disable the interrupting IP by w...

Page 18: ...from the Mail Box buffer Access to both ID and I O spaces are implemented with one wait state read or write data transfers There is one exception on a rare occasions read and write operations to the M...

Page 19: ...r is clocked by the 8MHz board clock The output of the Timer Prescaler counter is then used to clock the second counter Conversion Timer In this way the two counters are cascaded to provide variable t...

Page 20: ...ware limitations For example if an input may reach zero volts or less a bipolar input range should be selected 4 These ranges can only be achieved with 15 Volt external power supplies The input ranges...

Page 21: ...E Specification This module meets or exceeds all written Industrial I O Pack specifications per revision 0 7 1 Electrical Mechanical Interface Single Size IP Module IP Data Transfer Cycle Types Suppor...

Page 22: ...he field I O signals to the P2 connector on each of the Industrial I O Pack modules Field signals are accessed via screw terminal strips Each Industrial I O Pack IP has its own unique P2 pin assignmen...

Page 23: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 23...

Page 24: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 24...

Page 25: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 25...

Page 26: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 26...

Page 27: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 27...

Page 28: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 28...

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