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SERIES IP330 INDUSTRIAL I/O PACK                                  16-BIT HIGH DENSITY ANALOG INPUT MODULE 
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The converted data serially shifted, from the A/D Converter to 

the FPGA, represents the analog signal digitized in the previous 
convert cycle.  That is, the A/D Converter transfers digitized 
analog input data to the FPGA one convert cycle after it has been 
digitized.  Serially shifting of the 16-bits of digitized data to the 
FPGA and then writing to the Mail Box buffer is completed 8

µ

 

seconds after start of the convert cycle. 

 
Upon initiation of an A/D convert cycle, the analog input data is 

digitized and stored into an internal A/D Converter buffer.  Also 
during this cycle, the last converted data value is moved from the 
A/D Converter buffer to the FPGA’s Mail Box Buffer.  At this time, 
the New Data Available bit corresponding the previous converted 
channel is set in the FPGA register. 

 
Understanding this sequence of events is important when 

using the External Trigger Only scan mode.  The first digitized 
value received from the A/D Converter in External Trigger Only 
mode will not be written to the Mail Box buffer if the Start Convert 
bit is set prior to issuance of the first external trigger signal.  This 
first value received from the A/D Converter is digitized data that 
has remained in the A/D Converter’s buffer from a previous data 
acquisition session.  Likewise, to update the Mail Box with the last 
desired digitized data value one additional convert cycle is 
required. 

 
For all other scan modes the FPGA control logic will 

automatically discard the first digitized data value received from 
the A/D Converter.  It is not written to the Mail Box buffer.  In 
addition, the FPGA logic also automatically generates the required 
“flush” convert signals to obtain the last converted data value from 
the A/D Converter. 

 

EXTERNAL TRIGGER 

 

The external trigger connection is made via pin 49 of the P2 

Field I/O Connector.  For the Burst and Continuous scan modes 
the falling edge of the external trigger will start data acquisition 
which will then be controlled by the FPGA.  For External Trigger 
Only mode, each falling edge of the external trigger causes a 
conversion at the A/D Converter.  Once  the external trigger signal 
has been driven low, it should remain low for minimum of 500n 
seconds. 

 

TIMED PERIODIC TRIGGER CIRCUIT 

 

Timed Periodic Triggering is provided by two programmable 

counters (an 8-bit Timer Prescaler and a 16-bit Conversion Timer).  
The Timer Prescaler is clocked by the 8MHz. board clock.  The 
output of the Timer Prescaler counter is then used to clock the 
second counter (Conversion Timer).  In this way, the two counters 
are cascaded to provide variable time periods anywhere from 8

µ

 

seconds to 2.0889 seconds.  The output of the second counter is 
used to trigger the start of new A/D conversions for the Uniform 
Scan modes of operation.  For the Burst Continuous mode, the 
interval between conversions of each channel is fixed at 15

µ

 

seconds.  However, the interval between the group (burst) of 
channels can be controlled by the Interval Timer. 

 

INTERRUPT CONTROL LOGIC 

 

The IP330 can be configured to generate an interrupt after 

completion of conversion of a single channel or after conversion of 
a group of channels is completed.  IP interrupt signal INTREQ0* is 
issued to the carrier to request an interrupt.  An 8-bit interrupt 
service routine vector is provided during an interrupt acknowledge 
cycle on data lines D0 to D7.  The interrupt release mechanism 
employed is ROAK (Release On AcKnowledge).  The IP330 will 
release the INTREQ0* signal during an interrupt acknowledge 
cycle from the carrier. 

 

 

5.0 SERVICE AND REPAIR 

 

SERVICE AND REPAIR ASSISTANCE 

 

Annual return of the IP330 to Acromag for recalibration of the 

reference (calibration) voltages is highly recommended.  Corrected 
data accuracies depend heavily on the calibration voltages being 
within specification.  Contact Acromag for technical details and 
procedures which can be followed to periodically recalibrate the 
reference voltages. 

 
Surface-Mounted Technology (SMT) boards are generally 

difficult to repair.  It is highly recommended that a non-functioning 
board be returned to Acromag for repair.  The board can be easily 
damaged unless special SMT repair and service tools are used.  
Further, Acromag has automated test equipment that thoroughly 
checks the performance of each board.  When a board is first 
produced and when any repair is made, it is tested, placed in a 
burn-in room at elevated temperature, and retested before 
shipment. 

 
Please refer to Acromag's Service Policy Bulletin or contact 

Acromag for complete details on how to obtain parts and repair. 
 

PRELIMINARY SERVICE PROCEDURE 

 

Before beginning repair, be sure that all of the procedures in 

Section 2, Preparation For Use, have been followed.  Also, refer to 
the documentation of your carrier board to verify that it is correctly 
configured.  Replacement of the module with one that is known to 
work correctly is a good technique to isolate a faulty module. 
 
CAUTION:  POWER MUST BE TURNED OFF BEFORE 
                    REMOVING OR INSERTING BOARDS 
 

 

 

Acromag’s Applications Engineers can provide further 

technical assistance if required.  When needed, complete repair 
services are also available from Acromag. 

 

 

Summary of Contents for IP330 Series

Page 1: ...ut Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 1995 Acromag Inc Printed in the USA Data and speci...

Page 2: ...NCE 19 PRELIMINARY SERVICE PROCEDURE 19 6 0 SPECIFICATIONS 20 GENERAL SPECIFICATIONS 20 ANALOG INPUT 20 INDUSTRIAL I O PACK COMPLIANCE 21 APPENDIX 21 CABLE MODEL 5025 551 21 Recommended APC8600 Shiele...

Page 3: ...le ended channels Precision On Board Calibration Voltages Calibration autozero and autospan precision voltages are available to permit host computer correction of conversion errors Trimmed calibration...

Page 4: ...Library diskette Model IPSW LIB M03 MSDOS format to simplify communication with the board Example software functions are provided for both VMEbus and ISA bus PC AT applications All functions are writ...

Page 5: ...iguration Software configurable control registers are provided for control of external trigger mode data output format acquisition mode timer control interrupt mode convert channel s selection and cha...

Page 6: ...l has been driven low it should remain low for a minimum of 500n seconds As an output an active low TTL signal can be driven to additional IP330s thus providing a means to synchronize the conversions...

Page 7: ...elect Ch 07 27 28 Gain Select Ch 08 Gain Select Ch 09 29 2A Gain Select Ch 10 Gain Select Ch 11 2B 2C Gain Select Ch 12 Gain Select Ch 13 2D 2E Gain Select Ch 14 Gain Select Ch 15 2F 30 Gain Select Ch...

Page 8: ...10 Uniform Single 011 Burst Continuous 100 Burst Single 101 Convert on External Trigger Only 110 Not Used 111 Not Used See the Modes of Operation section for a description of each of these scan modes...

Page 9: ...z clock signal The output of this clock is input to the second counter the Conversion Timer and the output is used to generate periodic trigger pulses The time period between trigger pulses is describ...

Page 10: ...y 0CH Data Bit 15 14 13 12 11 10 09 08 SE or Diff Ch 15 14 13 12 11 10 09 08 Missed Data Register Read Only 0FH Data Bit 07 06 05 04 03 02 01 00 SE Channel 23 22 21 20 19 18 17 16 Diff Channel 07 06 0...

Page 11: ...niform continuous uniform single burst continuous burst single and convert on external trigger only In all modes a single channel or a sequence of channels may be converted The following sections desc...

Page 12: ...Box functions as a dual level data buffer The first half of the Mail Box is used to store all selected channel data for the initial pass through the channels defined by the Start and End Value regist...

Page 13: ...external trigger pulse no interrupt will be issued since data is not written to the Mail Box buffer If interrupt upon completion of a group of channels is selected an interrupt will be issued 8 secon...

Page 14: ...5 2 0 to 5 0 6125 CAL3 2 4500 CAL1 Input Range Volts PGA Gain ADC Range Volts Rec Low Calib Voltage VoltCALLO Volts Rec High Calib Voltage VoltCALHI Volts 0 to 1 25 4 0 to 5 0 6125 CAL3 1 2250 CAL2 0...

Page 15: ...are known It is now possible to correct input channel data from any input channel using the same input range i e 10 to 10 volts with a PGA gain 1 Repeat the above steps periodically to re measure the...

Page 16: ...CountCALHI Calculate Equation 2 Calculate m actual_slope from equation 2 since all parameters are known It is now possible to correct input channel data from any input channel using the same input ra...

Page 17: ...he host uses the vector to form a pointer to an interrupt service routine for the interrupt handler to begin execution 7 Example of Generic Interrupt Handler Actions a Disable the interrupting IP by w...

Page 18: ...from the Mail Box buffer Access to both ID and I O spaces are implemented with one wait state read or write data transfers There is one exception on a rare occasions read and write operations to the M...

Page 19: ...r is clocked by the 8MHz board clock The output of the Timer Prescaler counter is then used to clock the second counter Conversion Timer In this way the two counters are cascaded to provide variable t...

Page 20: ...ware limitations For example if an input may reach zero volts or less a bipolar input range should be selected 4 These ranges can only be achieved with 15 Volt external power supplies The input ranges...

Page 21: ...E Specification This module meets or exceeds all written Industrial I O Pack specifications per revision 0 7 1 Electrical Mechanical Interface Single Size IP Module IP Data Transfer Cycle Types Suppor...

Page 22: ...he field I O signals to the P2 connector on each of the Industrial I O Pack modules Field signals are accessed via screw terminal strips Each Industrial I O Pack IP has its own unique P2 pin assignmen...

Page 23: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 23...

Page 24: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 24...

Page 25: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 25...

Page 26: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 26...

Page 27: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 27...

Page 28: ...SERIES IP330 INDUSTRIAL I O PACK 16 BIT HIGH DENSITY ANALOG INPUT MODULE ___________________________________________________________________________________________ 28...

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