B-16
BHK-MG (OPR) 032816
B.65
STATus:PRESet COMMAND
STAT:PRES
Syntax
:
Short Form: STAT:PRES
Long Form: STATus:PRESet
Description:
Disables reporting of all status events.
This command sets all bits of the Operation Condition (Table
B-2) and Questionable Condition Registers to 0, preventing all status events from being reported.
(See example, Figure B-6.)
B.66
STATus:QUEStionable[:EVENt]? QUERY
STAT:QUES?
Syntax
:
Short Form: STAT:QUES[EVEN]?
Long Form: STATus:QUEStionable[EVENT]?
Return Value: <int_value> actual register value
Description:
Indicates questionable events that occurred since previous STAT:QUES? query.
Returns the
value of the Questionable Event register (see Table B-3). The Questionable Event register is a
read-only register which holds (latches) all events. Reading the Questionable Event register clears it.
(See example, Figure B-6.)
B.67
STATus:QUEStionable:CONDition? QUERY
STAT:QUES:COND?
Syntax
:
Short Form: STAT:QUES:COND?
Long Form: STATus:QUEStionable:CONDition?
Return Value: <int_value> actual register value
Description:
Returns the value of the Questionable Condition Register (see Table B-3).
The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply. Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false). (See
example, Figure B-6.)
B.68
STATus:QUEStionable:ENABle COMMAND
STAT:QUES:ENAB
Syntax
:
Short Form: STAT:QUES:ENAB <int_value> Long Form: STATus:QUESionable:ENABle <int_value>
Function:
Programs Questionable Condition Enable Register.
Description:
Programs Questionable Condition Enable Register (see Table B-3).
The Questionable Condition
Enable Register determines which conditions are allowed to set the Questionable Condition Register;
it is a mask for enabling
specific bits in the Questionable Event register that can cause the question-
able summary bit (bit 3) of the Status Byte register to be set. The questionable summary bit is the log-
ical OR of all the enabled bits in the Questionable Event register
.
Bit set to 1 = function enabled
(active, true); bit reset to 0 = function disabled (inactive, false)
.
(See example, Figure B-6.)
B.69
STATus:QUEStionable:ENABle? QUERY
STAT:QUES:ENAB?
Syntax
:
Short Form: STAT:QUES:ENAB? Long Form: STATus:QUESionable:ENABle?
Return Value: <int_value> actual register value
Description:
Reads Questionable Condition Enable Register (see Table B-3).
Power supply returns value of
Questionable Condition Enable Register, indicating which conditions are being monitored. Bit set to 1
= function enabled (active, true); bit reset to 0 = function disabled (inactive, false)
.
Related Com-
mands: STAT:QUES?. (See example, Figure B-6.)
TABLE B-3. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION
NU
OT
NU
BIT
15 - 4
3
2 - 0
VALUE
32,768 - 16
8
4 - 1
OT - OVERTEMPERATURE CONDITION
NU - NOT USED
Summary of Contents for BHK 1000-0.2MG
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Page 101: ...BHK MG OPR 032816 3 55 FIGURE 3 20 SERIES AUTOMATIC CONFIGURATION ...
Page 109: ...BHK MG OPR 032816 3 63 FIGURE 3 23 PARALLEL AUTOMATIC CONFIGURATION ...
Page 114: ...3 68 BHK MG OPR 032816 FIGURE 3 25 PARALLEL MASTER SLAVE CURRENT MODE CONFIGURATION ...
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