Internal Only
In Internal Only mode, all MOVX instructions will target the internal XRAM space on the device. Memory accesses to addresses beyond
the populated space will wrap and will always target on-chip XRAM. As an example, if the entire address space is consecutively written
and the data pointer is incremented after each write, the write pointer will always point to the first byte of on-chip XRAM after the last
byte of on-chip XRAM has been written.
• 8-bit MOVX operations use the contents of EMI0CN to determine the high-byte of the effective address and R0 or R1 to determine
the low-byte of the effective address.
• 16-bit MOVX operations use the contents of the 16-bit DPTR to determine the effective address.
Split Mode without Bank Select
In Split Mode without Bank Select, the XRAM memory map is split into two areas: on-chip space and off-chip space.
• Effective addresses below the on-chip XRAM boundary will access on-chip XRAM space.
• Effective addresses above the on-chip XRAM boundary will access off-chip space.
• 8-bit MOVX operations use the contents of EMI0CN to determine whether the memory access is onchip or off-chip. However, in the
No Bank Select mode, an 8-bit MOVX operation will not drive the upper bits A[15:8] of the Address Bus during an off-chip access.
This allows firmware to manipulate the upper address bits at will by setting the port state directly via the port latches. This behavior
is in contrast with Split Mode with Bank Select. The lower 8-bits of the Address Bus A[7:0] are driven, determined by R0 or R1.
• 16-bit MOVX operations use the contents of DPTR to determine whether the memory access is onchip or off-chip, and unlike 8-bit
MOVX operations, the full 16-bits of the Address Bus A[15:0] are driven during the off-chip transaction.
Split Mode with Bank Select
In Split Mode with Bank Select, the XRAM memory map is split into two areas: on-chip space and off-chip space.
• Effective addresses below the on-chip XRAM boundary will access on-chip XRAM space.
• Effective addresses above the on-chip XRAM boundary will access off-chip space.
• 8-bit MOVX operations use the contents of EMI0CN to determine whether the memory access is onchip or off-chip. The upper bits of
the Address Bus A[15:8] are determined by EMI0CN, and the lower 8-bits of the Address Bus A[7:0] are determined by R0 or R1. All
16-bits of the Address Bus A[15:0] are driven in Bank Select mode.
• 16-bit MOVX operations use the contents of DPTR to determine whether the memory access is onchip or off-chip, and the full 16-
bits of the Address Bus A[15:0] are driven during the off-chip transactions.
External Only
In External Only mode, all MOVX operations are directed to off-chip space. On-chip XRAM is not visible to the CPU. This mode is use-
ful for accessing off-chip memory located between 0x0000 and the on-chip XRAM boundary.
• 8-bit MOVX operations ignore the contents of EMI0CN. The upper Address bits A[15:8] are not driven (identical behavior to an off-
chip access in Split Mode without Bank Select). This allows firmware to manipulate the upper address bits at will by setting the port
state directly. The lower 8-bits of the effective address A[7:0] are determined by the contents of R0 or R1.
• 16-bit MOVX operations use the contents of DPTR to determine the effective address A[15:0]. The full 16-bits of the Address Bus
A[15:0] are driven during the off-chip transaction.
EFM8SB2 Reference Manual
External Memory Interface (EMIF0)
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