Nvis 5586A
Nvis Technologies Pvt. Ltd.
32
1: high-order byte
• 32-bit addresses are stored in "segment: offset" format as:
Address: low-order byte of segment
1: high-order byte of segment
2: low-order byte of offset
3: high-order byte of offset
• Physical memory address pointed by segment: offset pair is calculated as:
Address = (<segment> * 16) + <offset>
Program memory:
Program can be located anywhere in memory. Jump and call instructions
can be used for short jumps within currently selected 64 KB code segment, as well as for far
jumps anywhere within 1 MB of memory. All conditional jump instructions can be used to
jump within approxi127 to -127 bytes from current instruction.
Data memory:
The processor can access data in any one out of 4 available segments, which
limits the size of accessible memory to 256 KB (if all four segments point to different 64 KB
blocks).
Accessing data from the Data, Code, Stack or Extra segments can be usually done by
prefixing instructions with the DS:, CS:, SS: or ES: (some registers and instructions by
default may use the ES or SS segments instead of DS segment).Word data can be located at
odd or even byte boundaries. The processor uses two memory accesses to read 16-bit word
located at odd byte boundaries. Reading word data from even byte boundaries requires only
one memory access.
Stack memory
can be placed anywhere in memory. The stack can be located at odd memory
addresses, but it is not recommended for performance reasons.
Reserved locations
:
• 0000H - 03FFH are reserved for interrupt vectors. Each interrupt vector is a 32-bit pointer
in format segment: offset.
• FFFF0H - FFFFFH - after RESET the processor always starts program execution at the
FFFF0H address.
Interrupts
The dictionary meaning of the word ‗interrupt‘ is to break the sequence of operation. While
the CPU is executing a program, an ‗interrupt‘ breaks the normal sequence of execution of
instructions, diverts its execution to some other program called Interrupt Service Routine
(ISR). After executing ISR, the control is transferred back again to the main program which
was being executed at the time of interruption.
Summary of Contents for 5586A
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