Nvis 5586A
Nvis Technologies Pvt. Ltd.
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character generator RAM, it wills also temporary store the data in the data register. When the
address information is input into the instruction register, the relative data will be moved from
display register RAM or character generator RAM to the data register. Then the data can be
read from data register by using the output instruction of CPU.
One way to select the two registers is to select the register signal (RS) like follow:
RS
R/W Function
0
0
Data Bus —> instruction Register
0
1
Read out busy flags (BUSY FLAG
DB7)
and address counter (DB0-DB6)
1
0
Input into data register and execute
the inner instruction: (D.R.RAM—
> D.R.
OR C.G.RAM — D.R.)
1
1
Get the data out from register, and
execute the inner instruction:
(D.D.RAM—> D.R.
OR C.G.RAM—> D.R.)
Busy Flag (B.F.):
When busy flag is ―1‖, it indicates that the LCD Modular is executing the inner instruction
and no other instruction can be accepted. The LCD Modular can only accept information
when BF is lower to ―0‖.
Address Counter (A.C.)
:
The address counter is used to count the display data RAM, or address of character generator
RAM. When the address setting instruction address will be sent into the address counter.
When the data is sent into or read out from display register RAM or from the character
generator RAM, the address counter will automatically add or subtract 1.
When the content of address counter is in RS = 0 and R/W = 1, the output data line is DB0
DB6.
Display Data RAM (D.D. RAM):
This is an 80x8 bit RAM, which can store 80 8-bit character codes as the display data; it can
be sent to CPU as the RAM data section without going through RAM section.
Address setting of data display RAM is as followed:
High level bus
Low level bus
AC6 AC5
AC4
AC3 AC2 AC1
AC0
Data displays RAM and display position of LCD is as followed:
Character Position:
1 2 3 4 5 6 7 8 9 10 11…19 20
Summary of Contents for 5586A
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Page 48: ...Nvis 5586A Nvis Technologies Pvt Ltd 48 Diagram of module RESET power Instruction Set Note...