CHAPTER 19 INTERRUPT FUNCTIONS
Page 714 of 920
19.3.2
Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H)
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt.
The MK0L, MK0H, MK1L, MK1H, MK2L, and MK2H registers can be set by a 1-bit or 8-bit memory manipulation
instruction. When the MK0L and MK0H registers, the MK1L and MK1H registers, and the MK2L and MK2H
registers are combined to form 16-bit registers MK0, MK1, and MK2, they can be set by a 16-bit memory
manipulation instruction.
Reset signal generation sets these registers to FFH.
Remark
If an instruction that writes data to this register is executed, the number of instruction execution clocks
increases by 2 clocks.
Figure 19 - 4 Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H) (1/2)
Address: FFFE4H
After reset: FFH
Symbol
7
<6>
<5>
4
3
<2>
<1>
<0>
1
PMK4
PMK3
1
1
PMK0
LVIMK
WDTIMK
Address: FFFE5H
After reset: FFH
Symbol
<7>
6
5
4
3
<2>
<1>
<0>
TMMK01H
1
1
1
1
TMMK11H
CSIMK21
CSIMK20
Address: FFFE6H
After reset: FFH
Symbol
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
TMMK03
TMMK02
TMMK01
TMMK00
IICAMK0
SREMK1
TMMK03H
SRMK1
STMK1
CSIMK10
Address: FFFE7H
After reset: FFH
Symbol
<7>
<6>
<5>
<4>
3
<2>
<1>
<0>
TMMK10
TRJMK0
SRMK3
STMK3
CSIMK30
1
ITMK
RTCMK
ADMK
Address: FFFD4H
After reset: FFH
Symbol
<7>
<6>
5
<4>
<3>
<2>
<1>
<0>
PMK10
PMK9
1
PMK7
PMK6
TMMK13
TMMK12
TMMK11
Summary of Contents for RL78/G1H
Page 941: ...R01UH0575EJ0120 RL78 G1H...
