Link Layer Tests
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7.
Examiner transmits the U2 Exit LFPS to transition to U0 and waits to receive U2 Exit LFPS
from the PUT.
The test fails if the LFPS handshake does not conform to the following
specifications from section 6.9.2:
Between 300ns – 2ms elapses between the start of Examiner U2 Exit LFPS and
the start of the PUT U2 Exit LFPS.
The PUT U2 Exit LFPS duration is within 80us – 2ms.
The PUT enters Recovery within tNoLFPSResponseTimeout (2.0105ms) after the
start of its' U2 exit LFPS.
The value tNoLFPSResponseTimeout deadline is 2ms, but is given a
“calculated test time” expiration of 2.0105ms. This calculated test time is
defined in the USB 3.0 Link Layer Test Specification, Section 4. Please
refer to that document for details.
The test passes if all transactions are correct, no extra packets or LFPS signals
are received, and the PUT enters Recovery.
8.
After Examiner completes this test case, clear the U1/U2 registers through the CV prompt.
Specification Reference
Sections 7.2.4.2.2#1 ● 7.2.4.2.3#1,3,4,5,7,8 ● 7.2.4.2.7#2,3 ● 7.5.8.1#2 ● 7.5.8.2#5
7.20
PM_LC_TIMER Deadline Test (Downstream Port
Only)
Test Summary
This test verifies that the PUT accepts an LAU sent at the PM_LC_TIMER deadline.
Test Steps and Expected Results
1.
Examiner performs steps 1 to 3 of TD7.18 (Low Power Initiation for U1 Test - Downstream
Port Only).
2.
Examiner application prompts the test operator to enable and configure the U1 and U2
inactivity timers through USB30CV. CV will set the U1 Timeout field to 7Fh and the U2
Timeout field to 00h.
