IBM Power 595 Technical Overview And Introduction Download

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IBM Power 595 Technical Overview and Introduction

4.2.6 Availability in a partitioned environment

IBMs dynamic logical partitioning architecture has been extended with micro-partitioning
technology capabilities. These new features are provided by the POWER Hypervisor and are
configured using management interfaces on the HMC. This very powerful approach to
partitioning maximizes partitioning flexibility and maintenance. It supports a consistent
partitioning management interface just as applicable to single (full server) partitions as to
systems with hundreds of partitions.

In addition to enabling fine-grained resource allocation, these LPAR capabilities provide all
the servers in the POWER6 and POWER5 processor models the underlying capability to
individually assign any resource (processor core, memory segment, I/O slot) to any partition
in any combination. Not only does this allow exceptional configuration flexibility, it enables
many high availability functions like:

Resource sparing (dynamic processor deallocation and dynamic processor sparing).

Automatic redistribution of capacity on N+1 configurations (automated shared pool
redistribution of partition entitled capacities for dynamic processor sparing).

LPAR configurations with redundant I/O (across separate processor host bridges or even
physical drawers) allowing system designers to build configurations with improved
redundancy for automated recovery.

The ability to reconfigure a server

on the fly

. Because any I/O slot can be assigned to any

partition, a system administrator can

vary off

a faulty I/O adapter and

back fill

with another

available adapter, without waiting for a spare part to be delivered for service.

Live Partition Mobility provides the ability to move running partitions from one POWER6
process-based server to another (refer to section “PowerVM Live Partition Mobility” on
page 125).

Automated scaleup of high availability backup servers as required (through dynamic
LPAR).

Serialized sharing of devices (optical, tape) allowing

limited

use devices to be made

available to all the partitions.

Shared I/O devices through I/O server partitions. A single I/O slot can carry transactions
on behalf of several partitions, potentially reducing the cost of deployment and improving
the speed of provisioning of new partitions (new applications). Multiple I/O server
partitions can be deployed for redundancy, giving partitions multiple paths to access data
and improved availability in case of an adapter or I/O server partition outage.

In a logically partitioning architecture, all server memory is physically accessible to all
processor cores and all I/O devices in the system, regardless of physical placement of the
memory or where the logical partition operates. The POWER Hypervisor mode with real
memory offset facilities enables the POWER Hypervisor to ensure that any code running in a
partition (operating systems and firmware) only has access to the physical memory allocated
to the dynamic logical partition. POWER6 and POWER5 processor systems also have
IBM-designed PCI-to-PCI bridges that enable the POWER Hypervisor to restrict direct
memory access (DMA) from I/O devices to memory owned by the partition using the device.
The single memory cache coherency domain design is a key requirement for delivering the
highest levels of SMP performance. Because it is IBM’s strategy to deliver hundreds of
dynamically configurable logical partitions, allowing improved system utilization and reducing
overall computing costs, these servers must be designed to avoid or minimize conditions that
would cause a full server outage.

IBM’s availability architecture provides a high level of protection to the individual components
making up the memory coherence domain, including the memory, caches, and fabric bus. It