IP482 Industrial I/O Pack User’s Manual Counter Timer Module
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4. The following is a waveform diagram of this example. Since Quadrature
mode does not accept external triggers, assume that a software trigger has
already occurred.
i
i
Output
InB
InC
InA
Interrupts
When the index condition is true the counter will reload the value in
Counter Constant B register, and an interrupt is generated. The output
remains active for as long as the Index condition holds true. For further
information on encoder counting, index pulse conditions, interrupts, and
outputs, see the Quadrature Position Measurement description.
Pulse Width Modulation Example
The objective for this example is to create a pulse width modulated with
an active high pulse of 2
s and a low pulse of 6
s using 16-bit Counter 3.
The counter has an external active high gate-off, trigger, and clock signals.
The output is active high. Assume the external clock has a frequency of
500KHz. The Gate-Off signal will become active after 2 PWM cycles.
Additionally, debounce and interrupts are enabled.
1. Connect the inputs/output to the following pins (unpowered):
Pin # Connection
Description
3
In3_A(+)
Gate-Off
13
In3_B(+)
Ext. Clock
23
In3_C(+)
Ext. Trigger
35
Out3(+)
Output
2. Write the following information, B66AH, to Counter 3 Control Register
located at base address plus an offset of 0CH.
Bits
Logic
Operation
2,1,0
010
Sets the counter to Pulse Width Modulation mode.
3
1
Sets the output to active high.
5,4
10
Enable the Gate-Off input (InA) to active high.
7,6
01
Enables the external clock input (InB).
9,8
10
Enables the external Trigger Input (InC) to active high.
12,11,10
101
Sets the clock to an external source.
13
1
Enables input debounce on InA and InC.
14
0
Not used.
15
1
Enables interrupts.
PROGRAMMING
EXAMPLES
Figure 3.2:
Quadrature
waveform
In the figure each “i”
represents an interrupt
Table 3.20:
PWM Pin
Assignments for Counter 3
Note: Make sure all inputs
and outputs are properly
grounded.
Table 3.21:
PWM Counter
Control Register 3 Settings
