VME Mast Receive: A one (1) indicates that the device is a VMEbus
master having the capability to receive data from another Virtual Instrument
device’s Send Data Register. A zero indicates that this capability is absent
on this device.
LBUS Send: A one (1) indicates that this device is capable of sending Local
Bus data. A zero (0) indicates that it is unable to send data over the Local Bus.
LBUS Rec: A one (1) indicates that this device is capable of receiving
Local Bus data. A zero (0) indicates that it is unable to receive data over the
Local Bus.
Subclass Register
Base + 1E
16
Read only, returns 7FFF
16
: The Subclass Register identifies the
HP E1413 as an HP virtual instrument device.
FIFO Registers
The FIFO registers consist of the FIFO MSW, FIFO LSW, the FIFO Status,
and FIFO Reading Count Registers.
FIFO MSW and LSW Registers
Base + 20
16
and 22
16
Read only: IEEE 32-bit readings from the FIFO are read from these
registers. The FIFO MSW Register returns the most significant word of the
reading, and the FIFO LSW Register returns the least significant word.
MSW Registers and LSW Registers combine to become a 32-bit Motorola
format floating point value.
FIFO MSW Register
Address
15 - 0
Base + 20
16
Most Significant Word
FIFO LSW Register
Address
15 - 0
Base + 22
16
Least Significant Word
Note
Before reading these registers, the FIFO Data Ready bit in the FIFO Status
Register must be asserted. If these registers are read while the FIFO Data
Ready bit is de-asserted, a bus error will occur.
Appendix D
Register-Based Programming 351
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