Model 2461 Interactive SourceMeter® Instrument Reference Manual
Appendix C: Status model
2461-901-01 A/November 2015
C-11
Status Byte Register
The Status Byte Register monitors the registers and queues in the status model and generates
service requests (SRQs).
When bits are set in the status model registers and queues, they generate summary messages that
set or clear bits of the Status Byte Register. You can enable these bits to generate an SRQ.
Service requests (SRQs) instruct the controller that the instrument needs attention or that some event
has occurred. When the controller receives an SRQ, the controller can interrupt existing tasks to
perform tasks that address the request for service.
For example, you might program your instrument to send an SRQ when a specific instrument error
event occurs. To do this, you set the Status Request Enable bit 2 (EAV). In this example, the
following actions occur:
•
The error event occurs.
•
The error event is logged in the Error Queue.
•
The Error Queue sets the EAV bit of the Status Byte Register.
•
The EAV bits are summed.
•
The RQS bit of the Status Byte Register is set.
•
On a GPIB system, the SRQ line is asserted. On a VXI-11 or USB system, an SRQ event is
generated.
For an example of this, see the example code provided in
(on page C-23).
The summary messages from the status registers and queues set or clear the appropriate bits (B0,
B2, B3, B4, B5, and B7) of the Status Byte Register. These summary bits do not latch, and their
states (0 or 1) are solely dependent on the summary messages (0 or 1). For example, if the Standard
Event Register is read, its register will clear. As a result, its summary message resets to 0, which in
turn resets the ESB bit in the Status Byte Register.
The Status Byte Register also receives summary bits from itself, which sets the Master Summary
Status (MSS) bit.
When using the GPIB, USB, or VXI-11 serial poll sequence of the Model 2461 to get the status byte
(serial poll byte), bit B6 is the RQS bit. See
(on page C-14) for details on
using the serial poll sequence.
When using the
*STB?
common command or
status.condition
command to read the status
byte, bit B6 is the MSS bit.
To reset the bits of the Service Request Enable Register to 0, use 0 as the parameter value for the
command (for example,
*SRE
0
or
status.request_enable = 0
).
You can read and set which bits to AND in the Status Byte Register using the following commands.
Description
SCPI command
TSP command
Read the Status Byte Register
(on page B-9)
(on page 8-221)
Read the Status Request Enable
Register
(on page B-8)
(on page 8-
Enable bits in the Status Request
Enable Register
(on page B-8)
(on page 8-
