Chapter 4. CPU module
4 - 35
Example
Error detection
( )
_ANNUN_WR
= 1
_ANC
_WAR[0]
_ANC
_WAR[1]
=
=
=
=
=
=
=
=
10
0
0
0
0
0
0
0
_ANNUN_WR
= 1
_ANC
_WAR[0]
_ANC
_WAR[1]
=
=
=
=
=
=
=
=
10
0
0
0
0
0
0
0
_ANNUN_WR
= 1
_ANC
_WAR[0]
_ANC
_WAR[1]
=
=
=
=
=
=
=
=
10
0
0
0
0
0
0
0
_ANNUN_WR
= 1
_ANC
_WAR[0]
_ANC
_WAR[1]
=
=
=
=
=
=
=
=
10
0
0
0
0
0
0
0
If the user program had detected a system fault and set
_ANC_WB[10] to ON, the states of _ANNUN_WR and
_ANN_WAR [0..7] will be shown as left after the scan has been
finished
After the next scan has been finished, if the numbers 1, 2, 3, 10, 15 ,
40 , 50, 60 and 75 of _ANC_WB[n] are tuned on _ANC_WAR[n] will be
shown as left
As the number 10 has turned on (has occurred) in the previous scan,
though the number 10 has lower priority than the numbers 1, 2 and 3, it
will be the lower element of _ANC_WAR[n]. The _ANC_WB[75] is not
indicated as it is turned on and the warning that occurred before has
written to the _ANC_WAR[n].
After the next scan has been finished, if the numbers 1, 2, 3, 10, 15 ,
40 , 50, 60 and 75 of _ANC_WB[n] are tuned on _ANC_WAR[n] will be
shown as left.
The No. 10 warning has been released the content of _ANC_WAR[0] will
be cleared and the contents of _ANC_WAR[1..7] will shift into the lower
elements. The content of _ANC_WAR[7] will has been cleared by the
shifting and the content of _ANC_WB[75] will be written to _ANC_WAR[7].
If all warnings indicated on the _ANC_WB[n] are released during
operation, the _ANNUN_WR and _ANC_WAR[n] will be shown as left.
