MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor
16-1
Chapter 16
Queued Serial Peripheral Interface (QSPI) Module
This chapter describes the operation of the Queued Serial Peripheral interface module of the MCF5253
and provides its memory map and register descriptions.
16.1
Features
The QSPI module provides a serial peripheral interface with queued transfer capability. It allows users to
queue up to 16 transfers at once, eliminating CPU intervention between transfers.
•
Programmable queue to support up to 16 transfers without user intervention
•
Supports transfer sizes of 8 to 16 bits in 1-bit increments
•
Four peripheral chip-select lines for control of up to 15 devices
•
Programmable baud rates up to 17.5Mbps at a CPU clock of 140 MHz
•
Programmable delays
•
Programmable clock phase and polarity
•
Supports wraparound mode for continuous transfers
16.2
QSPI
Module Overview
The QSPI module communicates with the core using internal memory mapped registers starting at
MBAR + $400. See
Section 16.4, “QSPI Memory Map and Register Definitions.”
A block diagram of the
16.2.1
Interface and Pins
The module supports 4 external CS pins which can be decoded externally to provide control for up to 15
devices. There are a total of seven signals: QSPI_Dout, QSPI_Din, QSPI_CLK, QSPI_CS [3:0].
Peripheral chip-select signals, QSPI_CS[3:0], are used to select an external device as the source or
destination for serial data transfer. Signals are asserted at a logic level corresponding to the value of the
QSPI_CS[3:0] bits in the command RAM whenever a command in the queue is executed. More than one
chip-select signal can be asserted simultaneously.
Although QSPI_CS[3:0] will function as simple chip selects in most applications, up to 15 devices can be
selected by decoding them with an external 4-to-16 decoder.
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...