MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor
6-1
Chapter 6
Static RAM (SRAM)
This chapter describes the SRAM operation, memory map, register descriptions, initialization and SRAM
power management.
6.1
SRAM Features
•
Two 64 Kbyte SRAMS
•
Single-cycle access
•
Physically located on processor's high-speed local bus
•
Memory location programmable on any 64 Kbyte address boundary
•
Byte, word, longword address capabilities
6.2
SRAM Operation
The SRAM module provides a general-purpose memory block that the ColdFire processor can access in a
single cycle. The location of the memory block can be specified to any modulo-64K address within the
4GB address space. The memory is ideal for storing critical code or data structures or for use as the system
stack. Because the SRAM module is physically connected to the processor's high-speed local bus.
Depending on configuration information, instruction fetches may be sent to both the cache and the SRAM
block simultaneously. If the reference is mapped into the region defined by the SRAM, the SRAM
provides the data back to the processor, and the cache data discarded. Accesses from the SRAM module
are not cached.
Only SRAM1 can be accessed by the DMA controller of the MCF5253. SRAM0 and SRAM1 are made
up of two memory arrays each consisting of 2048 lines, with 16 Bytes in each line.
As SRAM1 can be accessed by the DMA then the split in the array (Upper 32K bank and Lower 32K bank)
allows simultaneous access by both DMA and the CPU.
shows this concept.
6.3
SRAM Memory Map and Register Definitions
The SRAM programming model includes a description of the SRAM base address register (RAMBAR),
SRAM initialization, and power management.
6.3.1
SRAM Base Address Register
The configuration information in the SRAM Base Address Register (RAMBAR[0:1]) controls the
operation of the SRAM module.
•
There are 2 RAMBAR registers. One for SRAM0, the second for SRAM1.
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
