Analog to Digital Converter (ADC)
MCF5253 Reference Manual, Rev. 1
12-4
Freescale Semiconductor
12.4
Functional Description
Each ADC input channel has its own on-chip comparator the output of which is multiplexed with the
digital section.The reason to have separate comparators for each channel allows for the inputs to be used
as GPI’s. In this mode the ADREF should be a fixed level (typically VDD/2) and each comparator is then
being used to indicate if its input is above or below this reference (HIGH or LOW). The state of each GPI
in this case is read using the GPIO_READ registers.
NOTE
It is possible to mix the use of each of these inputs between ADC and GPI
function as the ADOUT/SCLK4/GPIO58 pin can be switched between
providing the ramping ADOUT signal (ADC mode) to providing a fixed
level (VDD/2) by switching its operation to SCLK4 mode when
appropriate. SCLK4 will output a 50% duty cycle clock. Which when
integrated will produce a reference voltage close to VDD/2. The output
frequency of SCLK4 can be varied by programming the IIS4 Audio register.
See
Section 17.5, “Serial Audio Interface (I2S/EIAJ) Register
The ADC uses the sigma-delta modulation principle. The ADC external components required are an
integrator circuit comprising of a resistor and capacitor. The desired values for this integrator network are
dependent on the BUSCLK clock frequency and the associated setting of the ADconfig[ADCLK_SEL]
bits, which determine the maximum ADOUT PWM frequency.
12.4.1
Recommendations to Set-up of ADC and External Components
Do not run the ADC clock any faster than 10 MHz. This results in a maximum sampling frequency of
2441 Hz (10 MHz/4096).
To calculate the external component values use the following equation:
Eqn. 12-1
where K is a constant. If K is small, the ripple on the comparator input will be quite large, and there will
be some mis-measurement because the average value on both comparator pins is not equal. If K is small,
Table 12-3. ADvalue Register Field Descriptions
Field
Description
15–13
Reserved, should be cleared.
12
OF
Overflow. Indicates the input voltage is out of range. The ADC block does not support full rail-to-rail
conversions.
0 No overflow condition.
1 Overflow. Input signal is outside the operating voltage range of the ADC.
11–0
ADVALUE
AD measurement result.
RC
K
t
×
=
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
