USB, ATA DMA, and Clock Integration Module
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor
22-5
The 16 kbyte SRAM is connected via an arbiter to 3 busses:
•
It can be read and written directly by the USB. All transfers on the USB controller master bus are
done to the 16 kB cache memory via the arbiter. USB always has priority to this memory.
•
It can be read and written directly by the ColdFire CF2 core and by the ColdFire DMA engine. Note
here the peripheral is connected to a slow bus, and the performance is somewhat limited.
•
It can be read and written by the ATA DMA controller. This DMA controller can transfer data
between the cache RAM and the ATA interface.
The ATA controller has 2 busses, one connected to the internal bus, the second connected to the local ATA
DMA engine. The USB and ATA DMA controller are connected to the internal bus. For both, this
connection is used to access the module registers. All USB data transfers initiated by the USB will be to
and from the 16 kbytes cache memory. The USB does not see any other memory on the device.
22.3.1.1
Endianness Issues
The USB controller is little-endian, while the CPU is big-endian. The ATA controller endianness is
programmable; It can operate in both little-endian and big-endian modes. To resolve the issue, the cache
memory is visible from the CPU in straight-endianess and in swapped-endianness mode.
22.3.1.2
DMA Transfer between ATA and Cache RAM
The DMA of the ATA block can be used to transfer data between the ATA module and the cache RAM. In
order to transfer data between these two blocks, proceed as follows:
1. Make sure no unwanted transfer will start when configuring the DMA by clearing the
MISCCR[ATDA] bit.
2. Program bit MISCCR[DMAEND] to correctly reflect the endianness on the DMA you need.
3. Program ATA_DADDR[ATAADDR] to contain the address in the ATA module wherefrom or
whereto the data needs to be transferred. During the transfer, this address is kept constant. It will
not autoincrement or autodecrement.
The address is offset-0, so the value that needs to be programmed here is the result of the following
equation: [(ColdFire ATA register address) - (MBAR2 + 0x800)].
4. Program ATA_DADDR[RAMADDR] to contain the address in the cache RAM wherefrom or
whereto the data needs to be transferred. During the transfer, this address is autoincremented.
The address is offset-0, so the value that needs to be programmed here is the result of the following
equation: [(ColdFire cache RAM address) - (MBAR2 + 0x20000)].
Table 22-6. USB/ATA RAM Memory Map
MBAR2 Offset
Endian
0x2_0000
...
0x2_3FFF
Straight, read/write what’s in RAM
read data[31:0] = ram[31:0]
write data[31:0] = in[31:0]
0x3_0000
...
0x3_3FFF
Swapped. Read and write data swapped:
read data[31:0] = {ram[7:0],ram[15:8], ram[23:16], ram[31:24]}
write data[31:0] = {in[7:0], in[15:8], in[23:16], in[31:24]}
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...
