IDT 89HPES12N3 User Manual Download

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IDT Hot-Plug and Hot-Swap

Introduction

PES12N3 User Manual

6 - 6

June 7, 2006

Notes

A downstream POWER_INDICATOR_ON, POWER_INDICATOR_BLINK, or

POWER_INDICATOR_OFF message is sent down on port B or C when the hot-plug controller associated
with the port is enabled and the state of the Power Indicator Control (PIC) field is modified in the
PB_PCIESCTL or PC_PCIESCTL register.

An attention button pressed event and the Attention Button Pressed (ABP) bit in the PCI Express Slot

Status (PCIESST) register is set when the hot plug controller associated with the port is enabled and an
ATTENTION_BUTTON_PRESSED message is received on port B or C. ATTENTION_BUTTON PRESSED
messages are always consumed by the PES12N3 and not passed to the upstream port.

Hot-Plug Interrupts and Wake-up

The hot-plug controller associated with a downstream slot may generate an interrupt or wake up event.

Hot-plug interrupts are only generated when the Hot Plug Interrupt Enable (HPIE) bit is set in the corre-

sponding port’s PCI Express Slot Control (PCIESCTL) register.

The following bits, when set in the PCI Express Slot Status (PCIESSTS) register, generate an interrupt if

not masked by the corresponding bit in the PCI Express Slot Control (PCIESCTL) register or by the HPIE
bit: the Attention Button Pressed (ABP), Power Fault Detected (PFD), MRL Sensor Changed (MRLSC),
Presence Detected Changed (PDC), and Command Completed (CC).

When an unmasked hot-plug interrupt is generated, the action taken is determined by the MSI Enable

(EN) bit in the MSI Capability (MSICAP) register and the Interrupt Disable (INTXD) bit in the PCI Command
(PCICMD) register.

When the downstream port or the entire switch is in a D3

hot

state, then the hot-plug controller generates

a wake-up event using a PM_PME message instead of an interrupt if the event interrupt is not masked in
the slot control (PCIESCTL) register and hot-plug interrupts are disabled by the HPIE bit. If the event inter-
rupt is not masked and hot-plug interrupts are enabled, then both a PM_PME and an interrupt are gener-
ated. If the event interrupt is masked, then neither a PM_PME or interrupt are generated. Note that a
command completed (CC bit) interrupt will not generate a wake-up event.

Hot-Plug with Switch on an Add-In Card

This section discusses the use of the PES12N3 in add-in card applications in which the upstream port

may be hot-plugged into a slot.

The PCI Express Base Specification revision 1.0a allows the attention indicator, power indicator and

attention button to be implemented on an add-in card instead of board containing the slot. To support this,
the specification defines messages that implement virtual wires between the add-in card and the down-
stream port hot-plug controller. The PCI Express Base Specification revision 1.1 removed this capability.

When the Hot Plug Mode (HPMODE) bit is set in the Switch Control (PS_SWCTL) register, the hot-plug

controllers operate in PCIe revision 1.1 mode. In this mode, all hot plug messages received on the
upstream port are silently discarded and no hot-plug messages are sent on the upstream port.

If the HPMODE bit is cleared (default value), then hot-plug messages are generated and processed on

the upstream port.

Hot plug signals associated with the upstream port of the switch are listed in Table 6.9 and are alternate

functions of GPIO pins. See Chapter 8, General Purpose I/O.

Signal

Type

Name/Description

PAABN

Port A Attention Button Input.

PAAIN

Port A Attention Indicator Output.

PAPIN