IDT SMBus Interfaces
Slave SMBus Interface
PES12N3 User Manual
7 - 11
June 7, 2006
Notes
The format of the CMD field is shown in Figure 7.6 and described in Table 7.10.
Figure 7.6 CSR Register Read or Write CMD Field Format
Byte
Position
Field
Name
Description
0
CCODE
Command Code. Slave Command Code field described in Table 7.8.
1
BYTCNT
Byte Count. The byte count field is only transmitted for block type
SMBus transactions. SMBus word and byte accesses do not contain
this field. The byte count field indicates the number of bytes following
the byte count field when performing a write or setting up for a read.
The byte count field is also used when returning data to indicate the
number of following bytes (including status). Note that the byte count
field does not include the PEC byte if PEC is enabled.
2
CMD
Command. This field encodes fields related to the CSR register read
or write operation.
3
ADDRL
Address Low. Lower 8-bits of the doubleword CSR system address
of register to access.
4
ADDRU
Address Upper. Upper 6-bits of the doubleword CSR system
address of register to access. Bits 6 and 7 in the byte must be zero
and are ignored by the hardware.
5
DATALL
Data Low Low. Bits [7:0] of data doubleword.
6
DATALM
Data Low Middle. Bits [15:8] of data doubleword.
7
DATAUM
Data Upper Middle. Bits [23:16] of data doubleword.
8
DATAUU
Data Upper Upper. Bits [31:24] of data doubleword.
Table 7.9 CSR Register Read or Write Operation Byte Sequence
Bit
Field
Name
Type
Description
0
BELL
Read/Write
Byte Enable Lower Lower. When set, the byte enable for bits [7:0] of
the data word is enabled.
1
BELM
Read/Write
Byte Enable Lower Middle. When set, the byte enable for bits [15:8]
of the data word is enabled.
2
BEUM
Read/Write
Byte Enable Upper Middle. When set, the byte enable for bits
[23:16] of the data word is enabled.
3
BEUU
Read/Write
Byte Enable Upper Upper. When set, the byte enable for bits [31:24]
of the data word is enabled.
Table 7.10 CSR Register Read or Write CMD Field Description (Part 1 of 2)
Bit
6
Bit
7
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
BELL
BELM
WERR
BEUM
BEUU
OP
RERR
0
Summary of Contents for 89HPES12N3
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Page 14: ...IDT List of Figures PES12N3 User Manual viii June 7 2006 Notes...
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Page 50: ...IDT Switch Operation Switch Core Errors PES12N3 User Manual 4 10 June 7 2006 Notes...
Page 54: ...IDT Power Management Active State Power Management PES12N3 User Manual 5 4 June 7 2006 Notes...
Page 62: ...IDT Hot Plug and Hot Swap Hot Swap PES12N3 User Manual 6 8 June 7 2006 Notes...
Page 78: ...IDT SMBus Interfaces Slave SMBus Interface PES12N3 User Manual 7 16 June 7 2006 Notes...
Page 148: ...IDT Test and Debug SerDes Test Clock PES12N3 User Manual 10 6 June 7 2006...
Page 158: ...IDT JTAG Boundary Scan Usage Considerations PES12N3 User Manual 11 10 June 7 2006 Notes...
