18.4.8 SMB0FCN1: SMBus 0 FIFO Control 1
Bit
7
6
5
4
3
2
1
0
Name
TFRQ
TXNF
Reserved
RFRQ
RXE
Reserved
Access
R
R
R
R
R
R
Reset
1
1
0x0
0
1
0x0
SFR Page = 0x20; SFR Address: 0xC4
Bit
Name
Reset
Access Description
7
TFRQ
1
R
Transmit FIFO Request.
Set to 1 by hardware when the number of bytes in the TX FIFO is less than or equal to the TX FIFO threshold (TXTH).
Value
Name
Description
0
NOT_SET
The number of bytes in the TX FIFO is greater than TXTH.
1
SET
The number of bytes in the TX FIFO is less than or equal to TXTH.
6
TXNF
1
R
TX FIFO Not Full.
This bit indicates when the TX FIFO is full and can no longer be written to. If a write is performed when TXNF is cleared to
0 it will replace the most recent byte in the FIFO.
Value
Name
Description
0
FULL
The TX FIFO is full.
1
NOT_FULL
The TX FIFO has room for more data.
5:4
Reserved
Must write reset value.
3
RFRQ
0
R
Receive FIFO Request.
Set to 1 by hardware when the number of bytes in the RX FIFO is larger than specified by the RX FIFO threshold (RXTH).
Value
Name
Description
0
NOT_SET
The number of bytes in the RX FIFO is less than or equal to RXTH.
1
SET
The number of bytes in the RX FIFO is greater than RXTH.
2
RXE
1
R
RX FIFO Empty.
This bit indicates when the RX FIFO is empty. If a read is performed when RXE is set, the last byte will be returned.
Value
Name
Description
0
NOT_EMPTY
The RX FIFO contains data.
1
EMPTY
The RX FIFO is empty.
1:0
Reserved
Must write reset value.
EFM8UB3 Reference Manual
System Management Bus / I2C (SMB0)
silabs.com
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