Disabling the WDT
Writing 0xDE followed by 0xAD to the WDTCN register disables the WDT. The following code segment illustrates disabling the WDT:
CLR EA ; disable all interrupts
MOV WDTCN,#0DEh ; disable software watchdog timer
MOV WDTCN,#0ADh
; insert wait for 3 divided LFOSC0 clock periods
SETB EA ; re-enable interrupts
Note:
Code that implements the wait must be inserted. Code that implements the wait is not explicity implemented in the above se-
quence because it depends on the divided LFOSC0 clock and the SYSCLK clock selected.
The writes of 0xDE and 0xAD must occur within 4 clock cycles of each other, or the disable operation is ignored. Interrupts should be
disabled during this procedure to avoid delay between the two writes.
The counter retains its value when the WDT is disabled. The counter comparator is always active and can generate a watchdog timer
reset even if the watchdog timer is disabled. For example, a watchdog timer reset can be generated when changing from a higher to a
lower interval as the counter is not cleared when the WDT is disabled. To avoid this always clear the counter by resetting the WDT
before disabling and changing the timeout interval to a lower interval i.e., follow the code sequence in
.
Disabling the WDT Lockout
Writing 0xFF to WDTCN locks out the disable feature. Once locked out, the disable operation is ignored until the next system reset.
Writing 0xFF does not enable or reset the watchdog timer. Applications always intending to use the watchdog should write 0xFF to
WDTCN in the initialization code.
Setting the WDT Interval
WDTCN.[2:0] controls the watchdog timeout interval. The interval is given by the following equation, where T
LFOSC
is the low-frequency
oscillator clock period:
T
LFOSC
× 4(
WDTCN
2:0 +3
)
This provides a nominal interval range of 0.8 ms to 13.1 s when LFOSC0 is configured to run at 80 kHz. WDTCN.7 must be logic 0
when setting this interval. Reading WDTCN returns the programmed interval. WDTCN.[2:0] reads 111b after a system reset.
The following code segment illustrates changing the WDT interval to a lower interval:
MOV WDTCN,#0A5h ; reset watchdog timer
; insert wait for 2 divided LFOSC0 clock periods
CLR EA ; disable all interrupts
MOV WDTCN,#0DEh ; disable software watchdog timer
MOV WDTCN,#0ADh
; insert wait for 3 divided LFOSC0 clock periods
SETB EA ; re-enable interrupts
MOV WDTCN,WDT_interval ; change the current WDT interval to a lower interval with MSB cleared to 0
; insert wait for 1 SYSCLK period
Note:
Code that implements the wait must be inserted. Code that implements the wait is not explicity implemented in the above se-
quence because it depends on the divided LFOSC0 clock and the SYSCLK clock selected.
EFM8UB3 Reference Manual
Watchdog Timer (WDT0)
silabs.com
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