Chapter 4
Diagnostics
48
memory. If this memory is found to be defective, the BIOS will detect the defective memory row(s), write
these rows into CMOS for further processing, and display an appropriate error message on the front panel
LCD. The BIOS will then force a reset of the system. During the next boot, this written history will be read
from CMOS and the defective rows will be mapped out of the data path. The BIOS does not differentiate
between SBEs and MBEs. In both cases the system will reset and map out the defective row, upon
detection.
Combining the memory errors encountered in the first row test with base memory test leads to several
possible cases. Some failing cases are described below.
Case 1
The system is populated with more than one row of memory and the first row memory test encounters a SBE
(Single Bit Error). In this case, the BIOS will write these rows into CMOS history and map out the first row of
DIMMs and continues with base memory testing. If the base memory test does not encounter any memory
errors, then the system will continue to boot.
User Notification
The first row that contains the defective DIMM will be mapped out and the system will continue to boot with
the remaining memory. An error message will be displayed to video for the mapped out defect DIMM.
“First row test”
- displayed on the upper LCD line during first row test
“0064MB”
- displayed on the lower LCD line during first row test
“Base memory test”
- displayed on the upper LCD line and sometimes this message can go by very fast
Later an error message for the defective DIMM will be displayed on the video as follows:
8C9X: "DIMMS mapped out: Upper Board, n-n+3".
Where ‘n’ refers to the DIMM number.
Example:
Consider a system that is populated with two rows of 256 MB DIMMS in the upper board rows 1-4
and 5-8. If a single bit memory error was detected in DIMM 5 during the first row memory test and if no
errors were found during the base memory test, the following message will appear on the video during
POST:
2048 MB Total Memory Installed
1024 MB Configured
1024 MB Tested
The first line is the total memory installed (regardless of condition). The second line is the total memory
useable (and is less than the first line, only if defective DIMMS were found). The third line counts the
memory as the test is being performed. When the test is completed, the number in this line should equal the
number in the second line.
The following error message for the defective DIMM 5 will be displayed on the video as follows:
“8C95: DIMMs mapped out: Lower Board, 5 - 8”
User Action
If the user is satisfied with the configured memory on the system, no action is required. Otherwise, follow
these steps:
1. Determine the location of the row of defective DIMMs from the error message or by running the
EFI based SELViewer Utility or by running either the Intel Server Control (ISC) or Direct
Platform Control (DPC) to read the System Event Log (SEL). Replace the defective DIMMs (in
the example it is 5-8). On replacing the DIMMs, make sure the size and HP part number match.
2. Clear CMOS via the front panel or via clear CMOS jumper in order to clear previous bad DIMM
history.
3. Power on the system to continue.
Error Logging
Summary of Contents for Integrity rx4610
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