MAX32600 User’s Guide
System Configuration and Management
4.4 Registers (IOMAN)
IOMAN_SPI1_REQ.ss4_io
Field
Bits
Default
Access
Description
ss4_io
12
0
R/W
SPI1 SS[4] I/O Request
1:Requests SPI mode for SS[4].
IOMAN_SPI1_REQ.sr0_io
Field
Bits
Default
Access
Description
sr0_io
16
0
R/W
SPI1 SR[0] I/O Request
1:Requests SPI mode for SR[0].
IOMAN_SPI1_REQ.sr1_io
Field
Bits
Default
Access
Description
sr1_io
17
0
R/W
SPI1 SR[1] I/O Request
1:Requests SPI mode for SR[1].
IOMAN_SPI1_REQ.quad_io
Field
Bits
Default
Access
Description
quad_io
20
0
R/W
SPI1 Quad I/O Request
1:Requests SPI mode for SDIO[2] and SDIO[3].
Rev.1.3 April 2015
Maxim Integrated
Page 121