MAX32600 User’s Guide
Pin Configurations, Packages, and Special Function Multiplexing
5.4 GPIO Pins and Peripheral Mode Functions
Detailed Description
The GPIO function provides firmware with basic direct control and monitoring capabilities for digital I/O pins. The GPIO module only provides an APB slave interface,
as no burst capability is required to implement this function.
Firmware control of the output state is handled through two control registers:
which defines one of four modes of operation, while the
defines which of the two output states is enabled for that mode.
The following table defines all the combinations of mode and value with their defined drive state and pad control states.
MODE
Value
Drive State
gpio_out
gpio_en
three-state
0
High Z
0
0
three-state
1
Pullup
1
0
Normal
0
Drive 0
0
1
Normal
1
Drive 1
1
1
Open-Drain
0
Drive 0
0
1
Open-Drain
1
High Z
0
0
Open-Drain w/ PU
0
Drive 0
0
1
Open-Drain w/ PU
1
Pullup
1
0
In addition to firmware monitoring of I/O input state, logic is provided to monitor inputs for certain events and to generate interrupts to the processor on detection of
these events. Input monitoring functions as expected regardless of pad ownership.
The user can enable interrupt generation on rising edge detection, falling edge detection, or any edge detection. The user can also generate an interrupt on detection
of a high or low logic level. Each interrupt status event has a status bit and an enable register. The enable can mask the interrupt from being asserted to the
processor. This mask does not affect the setting of the interrupt status bit. Status bits and enable registers are organized along port boundaries; each port that
supports interrupt generation then provides an interrupt signal back to the processor.
Inputs can also be monitored for wakeup event generation to wake the system up from a low power state. This logic does not require a clock to be running to generate
the event, as a clock is typically not running while asleep.
5.4
GPIO Pins and Peripheral Mode Functions
For all GPIO pins, the GPIO operation is the lowest priority functionality. This mode will be enabled by default for any GPIO pins that have not been requested for use
as part of a higher-priority peripheral function.
Rev.1.3 April 2015
Maxim Integrated
Page 175
