MAX32600 User’s Guide
Communication Peripherals
7.3 UART
7.3.9.1.6
UARTn_BAUD_DIV_128
UARTn_BAUD_DIV_128.div
Field
Bits
Default
Access
Description
div
6:0
0
R/W
Decimal portion of baudrate DIV.
DIV=UARTn_BAUD_INT[11:0]+(UARTn_BAUD_DIV_128[6:0]/128)
7.3.9.1.7
UARTn_TX_FIFO_OUT
UARTn_TX_FIFO_OUT.tx_fifo
Field
Bits
Default
Access
Description
tx_fifo
7:0
n/a
R/O
TX FIFO Output
Writes have no effect.
Reading from this register returns the current value at the output of the TX FIFO, without changing the contents of the TX FIFO.
7.3.9.1.8
UARTn_HW_FLOW_CTRL
UARTn_HW_FLOW_CTRL.cts_input
Field
Bits
Default
Access
Description
cts_input
0
1
R/O
CTS Input Value
Returns the current value of the CTS I/O signal.
UARTn_HW_FLOW_CTRL.rts_output
Field
Bits
Default
Access
Description
rts_output
1
1
R/W
RTS Output Value
Rev.1.3 April 2015
Maxim Integrated
Page 299