21.5 Initialization / Application information
This section describes how to initialize and configure the MCG module in an application.
The following sections include examples on how to initialize the MCG and properly
switch between the various available modes.
21.5.1 MCG module initialization sequence
The MCG comes out of reset configured for FEI mode. The internal reference will
stabilize in t
irefsts
microseconds before the FLL can acquire lock. As soon as the internal
reference is stable, the FLL will acquire lock in t
fll_acquire
milliseconds.
21.5.1.1 Initializing the MCG
Because the MCG comes out of reset in FEI mode, the only MCG modes that can be
directly switched to upon reset are FEE, FBE, and FBI modes (see
Reaching any of the other modes requires first configuring the MCG for one of these
three intermediate modes. Care must be taken to check relevant status bits in the MCG
status register reflecting all configuration changes within each mode.
To change from FEI mode to FEE or FBE modes, follow this procedure:
1. Enable the external clock source by setting the appropriate bits in C2 register.
2. Write to C1 register to select the clock mode.
• If entering FEE mode, set C1[FRDIV] appropriately, clear the C1[IREFS] bit to
switch to the external reference, and leave the C1[CLKS] bits at 2'b00 so that the
output of the FLL is selected as the system clock source.
• If entering FBE, clear the C1[IREFS] bit to switch to the external reference and
change the C1[CLKS] bits to 2'b10 so that the external reference clock is
selected as the system clock source. The C1[FRDIV] bits should also be set
Chapter 21 Multipurpose Clock Generator (MCG)
KL02 Sub-Family Reference Manual, Rev. 2.1, July 2013
Freescale Semiconductor, Inc.
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