System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual,
Rev. 5
6-84
Freescale Semiconductor
6.3.1.12.98
Pad Configuration Registers 206–207 (SIU_PCR206–SIU_PCR207)
The SIU_PCR206–SIU_PCR207 registers control the pin function, direction, and static electrical
attributes of the GPIO[206:207] pins. These registers are separate from the PCR for GPIO[205] because
GPIO[206:207] are fast pad types with drive strength control and GPIO[205] is a medium pad type with
slew rate control. The PA bit is not implemented for these PCRs because GPIO is the only pin function.
NOTE
The GPIO[206:7] pins have the capability to trigger the ADCs. For the
ETRIG functionality, these GPIO pins need to be set as GPIO and then
select the GPIO ADC trigger in the (SIU_ETISR). Refer to
Section 6.3.1.15, “eQADC Trigger Input Select Register (SIU_ETISR)
.”
Figure 6-110. GPIO[206:207] Pad Configuration Registers (SIU_PCR206–SIU_PCR207)
Refer to
for bit field definitions.
6.3.1.12.99
Pad Configuration Register 208 (SIU_PCR208)
The SIU_PCR208 register controls the pin function, direction, and static electrical attributes of the
PLLCFG[0]_IRQ[4]_GPIO[208] pin.
Figure 6-111. PLLCFG[0]_IRQ[4]_GPIO[208] Pad Configuration Register (SIU_PCR208)
Refer to
for bit field definitions.
Address: Base + 0x01DC and Base + 0x01DE
Access: Read / write[6:11, 14:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
OBE
1
1
When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. When configured as
GPI, set the IBE bit to 1. Clear the IBE to 0 to reduce power consumption.
DSC
ODE
HYS
0
0
WPE
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Address: Base + 0x01E0
Access: Read / write[4:7, 10:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
1
1
The PLLCFG function applies only when the RSTCFG pin is asserted during reset. Set the PA field to 0b10 for IRQ[4] and
clear the PA field to 0b00 for GPIO[208].
OBE
2
2
When configured as IRQ, the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
3
3
When configured as IRQ or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. Clear the IBE
to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
0
0
ODE HYS
4
4
When configured as IRQ, set the HYS bit to 1.
SRC
WPE
WPS
W
RESET:
0
0
0
0
1
1
0
0
0
0
0
1
0
0
1
1
Summary of Contents for MPC5553
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