MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
13-24
Freescale Semiconductor
13.4.1.6
Flash Error Response Operation
The flash array can terminate a requested access with an error. This can occur due to an uncorrectable ECC
error, an access control violation, or because of improper access sequencing during program/erase
operations. When an error response is received, the FBIU will mark a line read buffer as invalid. An error
response can be signaled on read or write operations.
13.4.1.7
FBIU Line Read Buffers and Prefetch Operation
The FBIU contains a pair of 256-bit line read buffers which are used to hold data read from the flash array.
Each buffer operates independently and is filled using a single array access. The buffers are used for both
prefetch and normal demand fetches.
Prefetch triggering is controllable on a per-master and access-type basis. Bus masters can be enabled or
disabled from triggering prefetches, and triggering can be further restricted based on whether a read access
is for instruction or data and whether or not it is a burst access. A read access to the FBIU can trigger a
prefetch to the next sequential line of array data on the cycle following the request. The access address is
incremented to the next-higher 32-byte boundary, and A flash array prefetch is initiated if the data is not
already resident in a line read buffer. Prefetched data is loaded into the buffer which is not being used to
satisfy the original request.
Buffers can be in one of six states, listed here in prioritized order:
•
Invalid—the buffer contains no valid data.
•
Used—the buffer contains valid data which has been provided to satisfy a burst type read.
•
Valid—the buffer contains valid data which has been provided to satisfy a single type read.
•
Prefetched—the buffer contains valid data which has been prefetched to satisfy a potential future
access.
•
Busy—the buffer is currently being used to satisfy a burst read.
•
Busy fill—the buffer has been allocated to receive data from the flash array, and the array access
is still in progress.
Selection of a buffer to fill on a buffer miss is based on this prioritized order beginning with the first item
(invalid). Selection of a buffer to fill on a triggered prefetch is based on the buffer which is not being used
to satisfy the triggering access.
The consequences of this replacement policy are that buffers are selected for filling on a ‘least recently
updated’ basis when prefetching, and on a ‘most recently emptied’ basis for demand fetches (that is, a fetch
which is actually satisfying a current system bus access). This policy allows for prefetched data to remain
valid when non-prefetch enabled bus masters are granted flash access.
Several algorithms are available for prefetch control which trade off performance for power. They are
described in
Section 13.3.2.8, “Flash Bus Interface Unit Control Register (FLASH_BIUCR)
.” More
aggressive prefetching increases power due to the number of wasted (discarded) prefetches, but can
increase performance by lowering average read latency.
13.4.1.8
FBIU Instruction/Data Prefetch Triggering
Prefetch triggering can be enabled for instruction reads. Triggering can be enabled for all instruction reads
or only for instruction burst reads. Prefetch triggering can be enabled for data reads. Triggering can be
enabled for all data reads or only for data burst reads. Prefetches are not triggered by write cycles.
Summary of Contents for MPC5553
Page 5: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 2 Freescale Semiconductor...
Page 21: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 xvi Freescale Semiconductor...
Page 47: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 1 26 Freescale Semiconductor...
Page 163: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 4 20 Freescale Semiconductor...
Page 179: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 5 16 Freescale Semiconductor...
Page 561: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 13 38 Freescale Semiconductor...
Page 615: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 14 54 Freescale Semiconductor...
Page 707: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 17 68 Freescale Semiconductor...
Page 755: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 18 48 Freescale Semiconductor...
Page 873: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 19 118 Freescale Semiconductor...
Page 984: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 Freescale Semiconductor 21 41...
Page 985: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 21 42 Freescale Semiconductor...
Page 1019: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 22 34 Freescale Semiconductor...
Page 1129: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 25 90 Freescale Semiconductor...
