Chapter 1 Device Overview MC9S12ZVHY/MC9S12ZVHL Families
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
59
1.9.1.2
Special Single-Chip Mode
This mode is used for debugging operation, boot-strapping, or security related operations. The background
debug mode BDM is active on leaving reset in this mode.
1.9.2
Debugging Modes
The background debug mode (BDM) can be activated by the BDC module or directly when resetting into
Special Single-Chip mode. Detailed information can be found in the BDC module section.
Writing to internal memory locations using the debugger, whilst code is running or at a breakpoint, can
change the flow of application code.
The MC9S12ZVHY/MC9S12ZVHL Families supports BDC communication throughout the device Stop
mode. During Stop
mode, writes to control registers can alter the operation and lead to unexpected results. It is thus
recommended not to reconfigure the peripherals during STOP using the debugger.
1.9.3
Low Power Modes
The device has two dynamic-power modes (run and wait) and two static low-power modes stop and pseudo
stop). For a detailed description refer to
Chapter 7, “S12 Clock, Reset and Power Management Unit
•
Dynamic power mode: Run
— Run mode is the main full performance operating mode with the entire device clocked. The user
can configure the device operating speed through selection of the clock source and the phase
locked loop (PLL) frequency. To save power, unused peripherals must not be enabled.
•
Dynamic power mode: Wait
— This mode is entered when the CPU executes the WAI instruction. In this mode the CPU does
not execute instructions. The internal CPU clock is switched off. All peripherals can be active
in system wait mode. For further power consumption reduction, the peripherals can
individually turn off their local clocks. Asserting RESET, XIRQ, IRQ, or any other interrupt
that is not masked ends system wait mode.
•
Static power mode Pseudo-stop:
— In this mode the system clocks are stopped but the oscillator is still running and the real time
interrupt (RTI), watchdog (COP), RTC, LCD and Autonomous Periodic Interrupt (API) may
be enabled. Other peripherals are turned off. This mode consumes more current than system
STOP mode but, as the oscillator continues to run, the full speed wake up time from this mode
is significantly shorter.
•
Static power mode: Stop
— The oscillator is stopped in this mode. By default, clocks are switched off and the counters and
dividers remain frozen. The Autonomous Periodic Interrupt (API), Key Wake-Up, RTC, CAN
and the CAN physical layer transceiver modules may be enabled to wake the device.
