Sorensen MML Series Operation and Programming Manual
5-54
5.11.6 Output Queue
The Output Queue stores output messages sequentially on a FIFO (First-In, First-Out)
basis until they are read from the electronic load. When there are data in the queue, it
sets it to 4 (MAV bit) in the Status Byte register.
5.11.7 Standard Event Status
All programming errors that have occurred will set one or more of the error bits in the
Standard Event Status register. Table 5-7 describes the standard events that apply to
the electronic load. Reading of the Standard Event Status register will reset it to zero.
The Standard Event Enable register can be programmed to specify which standard
event bit is logically-ORed to become Bit 5 (ESB bit) in the Status Byte register.
Mnemonic Bit Value
Meaning
OPC
0
1
Operation Complete.
This event bit is a response to
the *OPC command. It indicates that the device has
completed all selected pending operations.
QYE
2
4
Query Error
. The output queue was read when no
data were present or the data in the queue were lost.
DDE
3
8
Device Dependent Error.
Memory was lost, or self-
test failed.
EXE
4
16
Execution Error
. A command parameter was outside
the legal range or inconsistent with the electronic
load’s operation, or the command could not be
executed due to some operating condition.
CME
5
32
Command Error.
A syntax or semantic error has
occurred, or the electronic load has received a
<GET> within a program message.
Table 5-7 Bit Description of Standard Event Status
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