HOST INTERFACE (HI)
5 - 28
PORT B
MOTOROLA
CAUTION
The HV should not be used with a value of zero because the reset location
is normally programmed with a JMP instruction. Doing so will cause an im-
proper fast interrupt.
5.3.3.3.2
CVR Reserved Bit (Bit 6)
Reserved bit which is unused and read by the host processor as zero.
5.3.3.3.3
CVR Host Command Bit (HC) Bit 7
The HC bit is used by the host processor to handshake the execution of host command
exceptions. Normally, the host processor sets HC=1 to request the host command
exception from the DSP. When the host command exception is acknowledged by the
DSP, the HC bit is cleared by the HI hardware. The host processor can read the state of
HC to determine when the host command has been accepted. The host processor may
elect to clear the HC bit, canceling the host command exception request at any time
before it is accepted by the DSP CPU.
CAUTION
The command exception might be recognized by the DSP and executed be-
fore it can be canceled by the host, even if the host clears the HC bit.
Setting HC causes host command pending (HCP) to be set in the HSR. The host can write
HC and HV in the same write cycle if desired. Hardware, software, individual, and STOP
resets clear HC.
5.3.3.4
Interrupt Status Register (ISR)
The ISR is an 8-bit read-only status register used by the host processor to interrogate the
status and flags of the HI. The host processor can write this address without affecting the
internal state of the HI, which is useful if the user desires to access all of the HI registers
by stepping through the HI addresses. The ISR can not be accessed by the DSP. The sta-
tus bits are described in the following paragraphs.
5.3.3.4.1
ISR Receive Data Register Full (RXDF) Bit 0
The RXDF bit indicates that the receive byte registers (RXH, RXM, and RXL) contain
data from the DSP CPU and may be read by the host processor. RXDF is set when the
HTX is transferred to the receive byte registers. RXDF is cleared when the receive data
low (RXL) register is read by the host processor. RXL is normally the last byte of the
receive byte registers to be read by the host processor. RXDF can be cleared by the host
processor using the initialize function. RXDF may be used to assert the external HREQ
pin if the RREQ bit is set. Regardless of whether the RXDF interrupt is enabled, RXDF
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Freescale Semiconductor, Inc.
For More Information On This Product,
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