ISD91200 Series Technical Reference Manual
Release Date: Sep 16, 2019
- 54 -
Revision 2.4
SysTick Control and Status
（
SYST_CSR
）
Register
Offset
R/W
Description
Reset Value
SYST_CSR
SYS0x10 R/W
SysTick Control and Status Register
0x0000_0000
Table 5-18 SysTick Control and Status Register (SYST_CSR, address 0xE000_E010)
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
COUNTFLAG
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
CLKSRC
TICKINT
ENABLE
Bits
Description
[31:17]
Reserved
Reserved
[16]
COUNTFLAG
Count Flag
Returns 1 if timer counted to 0 since last time this register was read.
0= Cleared on read or by a write to the Current Value register.
1= Set by a count transition from 1 to 0.
[15:3]
Reserved
Reserved
[2]
CLKSRC
Clock Source
0= Core clock unused.
1= Core clock used for SysTick, this bit will read as 1 and ignore writes.
[1]
TICKINT
Enables SysTick Exception Request
0 = Counting down to 0 does not cause the SysTick exception to be pended. Software
can use COUNTFLAG to determine if a count to zero has occurred.
1 = Counting down to 0 will cause SysTick exception to be pended. Clearing the
SysTick Current Value register by a register write in software will not cause
SysTick to be pended.
[0]
ENABLE
ENABLE
0 = The counter is disabled
1 = The counter will operate in a multi-shot manner.
