General-Purpose Static RAM (SRAM)
Freescale Semiconductor
11-5
PXR40 Microcontroller Reference Manual, Rev. 1
11.7.1
Example Code
To initialize SRAM correctly, use a store multiple word (
stmw)
instruction to implement 64-bit writes to
all SRAM locations. The
stmw
instruction concatenates two 32-bit registers to implement a single 64-bit
write. To ensure the writes are 64-bits, specify an even number of registers and write on 64-bit
word-aligned boundaries.
The following example code illustrates the use of the
stmw
instruction to initialize the SRAM ECC bits.
init_RAM:
lis
r11,0x4000
# base address of the SRAM, 64-bit word aligned
ori
r11,r11,0
# not needed for this address but could be for others
li
r12,2048
# loop counter to get all of SRAM;
# 256*1024/4 bytes/32 GPRs =2048
mtctr r12
init_ram_loop:
stmw
r0,0(r11)
# write all 32 GPRs to SRAM
addi
r11,r11,128
# inc the ram ptr; 32 GPRs * 4 bytes = 128
bdnz
init_ram_loop
# loop for 256K of SRAM
blr #
done
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
Page 30: ...PXR40 Microcontroller Reference Manual Rev 1 Freescale Semiconductor xxx...
Page 40: ...PXR40 Microcontroller Reference Manual Rev 1 xl Freescale Semiconductor...
Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
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Page 1167: ...Decimation Filter Freescale Semiconductor 28 53 PXR40 Microcontroller Reference Manual Rev 1...
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