Decimation Filter
Freescale Semiconductor
28-13
PXR40 Microcontroller Reference Manual, Rev. 1
28.2.2.3
Decimation Filter Module Extended Configuration Register
(DECFILT_x_MXCR)
28
DIVR
Enhanced Debug Monitor Input Data Read Overrun—The DIVR bit indicates that a received sample in the Filter
Interface Input Register was overwritten by a new sample and was not read by the CPU/DMA. This flag
generates an Interrupt Request if enabled by the ERREN bit in the Configuration Register. This Flag is cleared
by the DIVRC Status bit or by a soft reset of the decimation filter.
0 Input Data Read Overrun did not occur in Enhanced Debug monitor
1 Enhanced Debug Monitor Input Data Read Overrun occurred
29
OVF
Filter Overflow Flag—The OVF bit indicates that an overflow occurred in the filtered sample result. This flag
generates an Interrupt Request if enabled by the ERREN bit in the Configuration Register. This Flag is cleared
by the OVFC Status bit or by a soft reset of the decimation filter.
0 No overflow
1 Overflow occurred
30
OVR
Output Interface Buffer Overrun—The OVR bit indicates that a decimated sample was overwritten by a new
sample in the Interface Output Buffer Register. This flag generates an Interrupt Request if enabled by the
ERREN bit in the Configuration Register. This Flag is cleared by the OVRC Status bit or by a soft reset of the
decimation filter.
0 No Output Overrun
1 Filter Output Overrun occurred
31
IVR
Input Interface Buffer Overrun—The IVR bit indicates that a received sample in the Filter Interface Input Register
was overwritten by a new sample. This flag generates an Interrupt Request if enabled by the ERREN bit in the
Configuration Register. This Flag is cleared by the IVRC Status bit or by a soft reset of the decimation filter.
0 Input Buffer Overrun did not occur
1 Input Buffer Overrun occurred
Note:
Address: DECFILT_ 0x008
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
SDMAE SSIG SSAT SCSAT
0
0
0
0
0
0
0
0
0
0
0
0
W
SRQ SZRO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
SISEL
0
SZROSEL
0
0
SHLTSEL
0
SRQSEL
0
0
SENSEL
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 28-4. Decimation Filter Extended Configuration Register (DECFILT_x_MXCR)
Table 28-5. DECFILT_x_MSR Field Descriptions (continued)
Field
Description
Summary of Contents for PXR4030
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