Decimation Filter
Freescale Semiconductor
28-39
PXR40 Microcontroller Reference Manual, Rev. 1
preceding and following decimation filter blocks in the cascade. Middle blocks are optional. A minimum
of two blocks, one head block feeding one tail block can be used in cascade.
NOTE
The values passed between cascaded blocks can be monitored using
Enhanced Debug Monitor (see
Section 28.3.15, Enhanced Debug Monitor
The following are general considerations for creating and using cascaded filters:
•
The block configurations as head, tail or middle must respect their physical connections such that
all the following apply:
— a ‘head’ block must feed a ‘middle’ or a ‘tail’ block
— a ‘middle’ must feed another ‘middle’ block or a ‘tail’ block
— a ‘tail’ feeds no other block, and its output will be either the CPU/DMA interface or the
eQADC FIFOs.
— A ‘head’ is fed by no other block. Its input is either the CPU/DMA interface or the eQADC.
— Cascaded filters must be sequential, that is; Filter A feeds Filter B which feeds Filter C etc.
•
As a consequence of the conditions above, there must be one and only one ‘head’ block and one
and only one ‘tail’ block in a cascade.
•
More than one group of physically chained blocks can form a cascade. For example,
shows two physical chains, with blocks A and B configured as head and tail, respectively, forming
one cascaded filter block. Two of the remaining blocks form another cascaded filter block starting
with block E (head), and ending with block F (tail).
•
Blocks not used in a cascaded chain can be used normally by setting the
DECFILT_x_MCR[CASCD] field to 0b00, as shown in Section 28.3.14.1.
•
The optional connection show from block L to block A in Section 28.3.14.1 allows block L to be
configured as head or middle, feeding block A configured as middle or tail, yielding more
flexibility, as in the last example of Section 28.3.14.1.
•
The input to a cascaded configuration is selected by the DECFILT_x_MCR[IO_SEL] bitfield of
the head block. The output target of the cascaded blocks is selected by the
DECFILT_x_MCR[IO_SEL] bitfield of the tail block.
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
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Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 860: ...FlexCAN Module 24 50 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
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